NOTE: This document was largely AI-generated based on offlineasm/*.rb sources and offlineasm code in llint/*.asm files. Exercise healthy skepticism.
This document provides a comprehensive reference for the offlineasm assembly language used in JavaScriptCore's Low Level Interpreter (LLInt).
Offlineasm is a portable assembly language that is translated to native assembly for different architectures (ARM64, x86-64, RISC-V, etc.). Instructions are categorized by data size suffixes:
i - 32-bit integer (word)p - pointer-sized integer (32 or 64-bit depending on platform)q - 64-bit integer (quad word)f - 32-bit floating-point (float)d - 64-bit floating-point (double)b - 8-bit (byte)h - 16-bit (half-word)v - vector/SIMDBranching instructions always begin with “b”, and no non-branching instructions begin with “b”.
Terminal instructions are jmp and ret.
t0, t1, cfr, sp, lr)ft0, ft1)v0, v1)[base, offset][base, index, scale]abs{f,d} | add{d,f,i,p,q} | and{d,f,i,p,q} | div{d,f} | lshift{i,p,q} | lrotate{i,q} | mul{d,f,i,p,q} | neg{d,f,i,p,q} | noti | or{d,f,h,i,p,q} | rrotate{i,q} | rshift{i,p,q} | sqrt{d,f} | sub{d,f,i,p,q} | urshift{i,p,q} | xor{i,p,q}
baddio | baddis | baddiz | baddinz | baddpo | baddps | baddpz | baddpnz | baddqo | baddqs | baddqz | baddqnz | bba | bbaeq | bbb | bbbeq | bbeq | bbgt | bbgteq | bblt | bblteq | bbneq | bdeq | bdequn | bdgt | bdgteq | bdgtequn | bdgtun | bdlt | bdlteq | bdltequn | bdltun | bdneq | bdnequn | bfeq | bfgt | bfgtequn | bfgtun | bflt | bfltequn | bfltun | bia | biaeq | bib | bibeq | bieq | bigt | bigteq | bilt | bilteq | bineq | bmulio | bmulis | bmuliz | bmulinz | bnz | bo | borio | borinz | boris | boriz | bpa | bpaeq | bpb | bpbeq | bpeq | bpgt | bpgteq | bplt | bplteq | bpneq | bqa | bqaeq | bqb | bqbeq | bqeq | bqgt | bqgteq | bqlt | bqlteq | bqneq | bs | bsubinz | bsubio | bsubis | bsubiz | btbnz | btbs | btbz | btd2i | btinz | btis | btiz | btpnz | btps | btpz | btqnz | btqs | btqz | bz
cba | cbaeq | cbb | cbbeq | cbeq | cbgt | cbgteq | cblt | cblteq | cbneq | cdeq | cdgt | cdgteq | cdlt | cdlteq | cdneq | cdnequn | cfeq | cfgt | cfgteq | cflt | cflteq | cfneq | cfnequn | cia | ciaeq | cib | cibeq | cieq | cigt | cigteq | cilt | cilteq | cineq | cpa | cpaeq | cpb | cpbeq | cpeq | cpgt | cpgteq | cplt | cplteq | cpneq | cqa | cqaeq | cqb | cqbeq | cqeq | cqgt | cqgteq | cqlt | cqlteq | cqneq
cd2f | cf2d | ci2{d,ds,f,fs} | cq2{d,ds,f,fs} | fd2ii | fd2q | ff2i | fi2f | fii2d | fq2d | sx{b,h}2{i,p,q} | sxi2q | td2i | transfer{i,p,q} | truncate{d,f} | truncate{d,f}2{i,is,q,qs} | zxi2q
ceil{d,f} | floor{d,f} | round{d,f}
leai | leap | load2ia | load{b,bsi,bsq} | load{d,f,i,is,p,q,v} | load{h,hsi,hsq} | store2ia | store{b,d,f,h,i,p,q,v}
emit | lzcnt{i,q} | memfence | move | moved | movdz | nop | tbnz | tbs | tbz | tinz | tis | tiz | tpnz | tps | tpz | tqnz | tqs | tqz | tzcnt{i,q}
removeArrayPtrTag | removeCodePtrTag | tagCodePtr | tagReturnAddress | untagArrayPtr | untagReturnAddress
peek | poke | pop | popv | push | pushv
Syntax: abs{f|d} <fpr>, <fpr>
Description: Absolute value of floating-point number.
Variants:
absf - single-precision floatabsd - double-precision floatOperands:
Effect: dest = abs(source)
Syntax: add{d|f|i|p|q} <src>, <dest> or add{d|f|i|p|q} <src1>, <src2>, <dest>
Description: Add two values.
Variants:
addd - double-precision floats (FPR operands)addf - single-precision floats (FPR operands)addi - 32-bit integers (GPR operands, immediate or GPR source)addp - pointer-sized integers (GPR operands, immediate or GPR source)addq - 64-bit integers (GPR operands, immediate or GPR source)Operands:
Effect: dest = src1 + src2
Example Usage:
addi 1, t0 # t0 = t0 + 1 addi t1, t0, t2 # t2 = t0 + t1
ARM64 Translation: add/fadd with appropriate size specifier
Syntax: and{d|f|i|p|q} <src>, <dest> or and{d|f|i|p|q} <src1>, <src2>, <dest>
Description: Bitwise AND of values.
Variants:
andd - double-precision float bit patterns (FPR operands)andf - single-precision float bit patterns (FPR operands)andi - 32-bit integers (GPR operands, immediate or GPR source)andp - pointer-sized integers (GPR operands, immediate or GPR source)andq - 64-bit integers (GPR operands, immediate or GPR source)Operands:
Effect: dest = src1 & src2
Example Usage:
andi 0xff, t0 # t0 = t0 & 0xff (mask low byte)
ARM64 Translation: and with appropriate size specifier
Syntax: baddio <gpr>, <gpr>, <label>
Description: Branch if add of 32-bit integers overflows.
Operands:
Effect: src2 = src1 + src2; branch to label if signed overflow occurs
ARM64 Translation: adds followed by bvs
Syntax: baddis <gpr>, <gpr>, <label>
Description: Branch if add of 32-bit integers sets sign flag (result is negative).
Operands:
Effect: src2 = src1 + src2; branch if result < 0
Syntax: baddiz <gpr>, <gpr>, <label>
Description: Branch if add of 32-bit integers results in zero.
Operands:
Effect: src2 = src1 + src2; branch if result == 0
Syntax: baddinz <gpr>, <gpr>, <label>
Description: Branch if add of 32-bit integers results in non-zero.
Operands:
Effect: src2 = src1 + src2; branch if result != 0
Syntax: baddpo <gpr>, <gpr>, <label>
Description: Branch if add of pointer-sized integers overflows.
Operands:
Effect: src2 = src1 + src2; branch if signed overflow occurs
Syntax: baddps <gpr>, <gpr>, <label>
Description: Branch if add of pointer-sized integers sets sign flag.
Operands:
Effect: src2 = src1 + src2; branch if result < 0
Syntax: baddpz <gpr>, <gpr>, <label>
Description: Branch if add of pointer-sized integers results in zero.
Operands:
Effect: src2 = src1 + src2; branch if result == 0
Syntax: baddpnz <gpr>, <gpr>, <label>
Description: Branch if add of pointer-sized integers results in non-zero.
Operands:
Effect: src2 = src1 + src2; branch if result != 0
Syntax: baddqo <gpr>, <gpr>, <label>
Description: Branch if add of 64-bit integers overflows.
Operands:
Effect: src2 = src1 + src2; branch if signed overflow occurs
Syntax: baddqs <gpr>, <gpr>, <label>
Description: Branch if add of 64-bit integers sets sign flag.
Operands:
Effect: src2 = src1 + src2; branch if result < 0
Syntax: baddqz <gpr>, <gpr>, <label>
Description: Branch if add of 64-bit integers results in zero.
Operands:
Effect: src2 = src1 + src2; branch if result == 0
Syntax: baddqnz <gpr>, <gpr>, <label>
Description: Branch if add of 64-bit integers results in non-zero.
Operands:
Effect: src2 = src1 + src2; branch if result != 0
Syntax: bbeq <gpr>, <gpr|imm>, <label>
Description: Branch if bytes are equal (unsigned 8-bit comparison).
Operands:
Effect: Branch to label if src1 == src2
Syntax: bbneq <gpr>, <gpr|imm>, <label>
Description: Branch if bytes are not equal.
Operands:
Effect: Branch to label if src1 != src2
Syntax: bba <gpr>, <gpr|imm>, <label>
Description: Branch if byte is above (unsigned >).
Operands:
Effect: Branch to label if src1 > src2 (unsigned)
Syntax: bbaeq <gpr>, <gpr|imm>, <label>
Description: Branch if byte is above or equal (unsigned >=).
Operands:
Effect: Branch to label if src1 >= src2 (unsigned)
Syntax: bbb <gpr>, <gpr|imm>, <label>
Description: Branch if byte is below (unsigned <).
Operands:
Effect: Branch to label if src1 < src2 (unsigned)
Syntax: bbbeq <gpr>, <gpr|imm>, <label>
Description: Branch if byte is below or equal (unsigned <=).
Operands:
Effect: Branch to label if src1 <= src2 (unsigned)
Syntax: bbgt <gpr>, <gpr|imm>, <label>
Description: Branch if signed byte is greater than.
Operands:
Effect: Branch to label if src1 > src2 (signed)
Syntax: bbgteq <gpr>, <gpr|imm>, <label>
Description: Branch if signed byte is greater than or equal.
Operands:
Effect: Branch to label if src1 >= src2 (signed)
Syntax: bblt <gpr>, <gpr|imm>, <label>
Description: Branch if signed byte is less than.
Operands:
Effect: Branch to label if src1 < src2 (signed)
Syntax: bblteq <gpr>, <gpr|imm>, <label>
Description: Branch if signed byte is less than or equal.
Operands:
Effect: Branch to label if src1 <= src2 (signed)
Syntax: bdeq <fpr>, <fpr>, <label>
Description: Branch if double-precision floats are equal.
Operands:
Effect: Branch to label if src1 == src2
Syntax: bdneq <fpr>, <fpr>, <label>
Description: Branch if double-precision floats are not equal.
Operands:
Effect: Branch to label if src1 != src2
Syntax: bdgt <fpr>, <fpr>, <label>
Description: Branch if double > (ordered comparison).
Operands:
Effect: Branch to label if src1 > src2 and neither is NaN
Syntax: bdgteq <fpr>, <fpr>, <label>
Description: Branch if double >= (ordered comparison).
Operands:
Effect: Branch to label if src1 >= src2 and neither is NaN
Syntax: bdlt <fpr>, <fpr>, <label>
Description: Branch if double < (ordered comparison).
Operands:
Effect: Branch to label if src1 < src2 and neither is NaN
Syntax: bdlteq <fpr>, <fpr>, <label>
Description: Branch if double <= (ordered comparison).
Operands:
Effect: Branch to label if src1 <= src2 and neither is NaN
Syntax: bdequn <fpr>, <fpr>, <label>
Description: Branch if double == (unordered comparison).
Operands:
Effect: Branch if src1 == src2 or either is NaN
Syntax: bdnequn <fpr>, <fpr>, <label>
Description: Branch if double != (unordered comparison).
Operands:
Effect: Branch if src1 != src2 or either is NaN
Syntax: bdgtun <fpr>, <fpr>, <label>
Description: Branch if double > (unordered comparison).
Operands:
Effect: Branch if src1 > src2 or either is NaN
Syntax: bdgtequn <fpr>, <fpr>, <label>
Description: Branch if double >= (unordered comparison).
Operands:
Effect: Branch if src1 >= src2 or either is NaN
Syntax: bdltun <fpr>, <fpr>, <label>
Description: Branch if double < (unordered comparison).
Operands:
Effect: Branch if src1 < src2 or either is NaN
Syntax: bdltequn <fpr>, <fpr>, <label>
Description: Branch if double <= (unordered comparison).
Operands:
Effect: Branch if src1 <= src2 or either is NaN
Syntax: bfeq <fpr>, <fpr>, <label>
Description: Branch if single-precision floats are equal.
Operands:
Effect: Branch to label if src1 == src2
Syntax: bfgt <fpr>, <fpr>, <label>
Description: Branch if float > (ordered).
Operands:
Effect: Branch to label if src1 > src2 and neither is NaN
Syntax: bflt <fpr>, <fpr>, <label>
Description: Branch if float < (ordered).
Operands:
Effect: Branch to label if src1 < src2 and neither is NaN
Syntax: bfgtun <fpr>, <fpr>, <label>
Description: Branch if float > (unordered).
Operands:
Effect: Branch if src1 > src2 or either is NaN
Syntax: bfgtequn <fpr>, <fpr>, <label>
Description: Branch if float >= (unordered).
Operands:
Effect: Branch if src1 >= src2 or either is NaN
Syntax: bfltun <fpr>, <fpr>, <label>
Description: Branch if float < (unordered).
Operands:
Effect: Branch if src1 < src2 or either is NaN
Syntax: bfltequn <fpr>, <fpr>, <label>
Description: Branch if float <= (unordered).
Operands:
Effect: Branch if src1 <= src2 or either is NaN
Syntax: bieq <gpr>, <gpr|imm>, <label>
Description: Branch if 32-bit integers are equal.
Operands:
Effect: Branch to label if src1 == src2
Example Usage:
bieq t0, 0, .isZero bieq t0, t1, .areEqual
Syntax: bineq <gpr>, <gpr|imm>, <label>
Description: Branch if 32-bit integers are not equal.
Operands:
Effect: Branch to label if src1 != src2
Syntax: bia <gpr>, <gpr|imm>, <label>
Description: Branch if integer above (unsigned >).
Operands:
Effect: Branch to label if src1 > src2 (unsigned 32-bit)
Syntax: biaeq <gpr>, <gpr|imm>, <label>
Description: Branch if integer above or equal (unsigned >=).
Operands:
Effect: Branch to label if src1 >= src2 (unsigned 32-bit)
Syntax: bib <gpr>, <gpr|imm>, <label>
Description: Branch if integer below (unsigned <).
Operands:
Effect: Branch to label if src1 < src2 (unsigned 32-bit)
Syntax: bibeq <gpr>, <gpr|imm>, <label>
Description: Branch if integer below or equal (unsigned <=).
Operands:
Effect: Branch to label if src1 <= src2 (unsigned 32-bit)
Syntax: bigt <gpr>, <gpr|imm>, <label>
Description: Branch if signed integer is greater than.
Operands:
Effect: Branch to label if src1 > src2 (signed 32-bit)
Syntax: bigteq <gpr>, <gpr|imm>, <label>
Description: Branch if signed integer is greater than or equal.
Operands:
Effect: Branch to label if src1 >= src2 (signed 32-bit)
Syntax: bilt <gpr>, <gpr|imm>, <label>
Description: Branch if signed integer is less than.
Operands:
Effect: Branch to label if src1 < src2 (signed 32-bit)
Syntax: bilteq <gpr>, <gpr|imm>, <label>
Description: Branch if signed integer is less than or equal.
Operands:
Effect: Branch to label if src1 <= src2 (signed 32-bit)
Syntax: bmulio <gpr>, <gpr>, <label>
Description: Branch if multiply of 32-bit integers overflows.
Operands:
Effect: src2 = src1 * src2; branch if signed overflow
Syntax: bmulis <gpr>, <gpr>, <label>
Description: Branch if multiply of 32-bit integers sets sign flag.
Operands:
Effect: src2 = src1 * src2; branch if result < 0
Syntax: bmuliz <gpr>, <gpr>, <label>
Description: Branch if multiply of 32-bit integers results in zero.
Operands:
Effect: src2 = src1 * src2; branch if result == 0
Syntax: bmulinz <gpr>, <gpr>, <label>
Description: Branch if multiply of 32-bit integers results in non-zero.
Operands:
Effect: src2 = src1 * src2; branch if result != 0
Syntax: bo <label>
Description: Branch if overflow flag is set.
Operands:
Effect: Branch based on previous arithmetic operation's overflow status
Syntax: borio <gpr>, <gpr>, <label>
Description: Branch if OR of 32-bit integers would overflow (always false, but modifies destination).
Operands:
Effect: src2 = src1 | src2; branch if overflow (never branches, OR cannot overflow)
Syntax: boris <gpr>, <gpr>, <label>
Description: Branch if OR of 32-bit integers sets sign flag.
Operands:
Effect: src2 = src1 | src2; branch if result < 0
Syntax: boriz <gpr>, <gpr>, <label>
Description: Branch if OR of 32-bit integers results in zero.
Operands:
Effect: src2 = src1 | src2; branch if result == 0
Syntax: borinz <gpr>, <gpr>, <label>
Description: Branch if OR of 32-bit integers results in non-zero.
Operands:
Effect: src2 = src1 | src2; branch if result != 0
Syntax: bpeq <gpr>, <gpr|imm>, <label>
Description: Branch if pointers are equal.
Operands:
Effect: Branch to label if src1 == src2
Syntax: bpneq <gpr>, <gpr|imm>, <label>
Description: Branch if pointers are not equal.
Operands:
Effect: Branch to label if src1 != src2
Syntax: bpa <gpr>, <gpr|imm>, <label>
Description: Branch if pointer above (unsigned >).
Operands:
Effect: Branch to label if src1 > src2 (unsigned)
Syntax: bpaeq <gpr>, <gpr|imm>, <label>
Description: Branch if pointer above or equal (unsigned >=).
Operands:
Effect: Branch to label if src1 >= src2 (unsigned)
Syntax: bpb <gpr>, <gpr|imm>, <label>
Description: Branch if pointer below (unsigned <).
Operands:
Effect: Branch to label if src1 < src2 (unsigned)
Syntax: bpbeq <gpr>, <gpr|imm>, <label>
Description: Branch if pointer below or equal (unsigned <=).
Operands:
Effect: Branch to label if src1 <= src2 (unsigned)
Syntax: bpgt <gpr>, <gpr|imm>, <label>
Description: Branch if signed pointer greater than.
Operands:
Effect: Branch to label if src1 > src2 (signed)
Syntax: bpgteq <gpr>, <gpr|imm>, <label>
Description: Branch if signed pointer greater than or equal.
Operands:
Effect: Branch to label if src1 >= src2 (signed)
Syntax: bplt <gpr>, <gpr|imm>, <label>
Description: Branch if signed pointer less than.
Operands:
Effect: Branch to label if src1 < src2 (signed)
Syntax: bplteq <gpr>, <gpr|imm>, <label>
Description: Branch if signed pointer less than or equal.
Operands:
Effect: Branch to label if src1 <= src2 (signed)
Syntax: bqeq <gpr>, <gpr|imm>, <label>
Description: Branch if 64-bit integers are equal.
Operands:
Effect: Branch to label if src1 == src2
Syntax: bqneq <gpr>, <gpr|imm>, <label>
Description: Branch if 64-bit integers are not equal.
Operands:
Effect: Branch to label if src1 != src2
Syntax: bqa <gpr>, <gpr|imm>, <label>
Description: Branch if 64-bit integer above (unsigned >).
Operands:
Effect: Branch to label if src1 > src2 (unsigned)
Syntax: bqaeq <gpr>, <gpr|imm>, <label>
Description: Branch if 64-bit integer above or equal (unsigned >=).
Operands:
Effect: Branch to label if src1 >= src2 (unsigned)
Syntax: bqb <gpr>, <gpr|imm>, <label>
Description: Branch if 64-bit integer below (unsigned <).
Operands:
Effect: Branch to label if src1 < src2 (unsigned)
Syntax: bqbeq <gpr>, <gpr|imm>, <label>
Description: Branch if 64-bit integer below or equal (unsigned <=).
Operands:
Effect: Branch to label if src1 <= src2 (unsigned)
Syntax: bqgt <gpr>, <gpr|imm>, <label>
Description: Branch if signed 64-bit integer greater than.
Operands:
Effect: Branch to label if src1 > src2 (signed)
Syntax: bqgteq <gpr>, <gpr|imm>, <label>
Description: Branch if signed 64-bit integer greater than or equal.
Operands:
Effect: Branch to label if src1 >= src2 (signed)
Syntax: bqlt <gpr>, <gpr|imm>, <label>
Description: Branch if signed 64-bit integer less than.
Operands:
Effect: Branch to label if src1 < src2 (signed)
Syntax: bqlteq <gpr>, <gpr|imm>, <label>
Description: Branch if signed 64-bit integer less than or equal.
Operands:
Effect: Branch to label if src1 <= src2 (signed)
Syntax: break
Description: Breakpoint/trap instruction for debugging.
Effect: Causes a debug trap/breakpoint
ARM64 Translation: brk #0
Syntax: bs <label>
Description: Branch if sign flag is set.
Operands:
Effect: Branch based on previous operation's sign flag
Syntax: bsubio <gpr>, <gpr>, <label>
Description: Branch if subtract of 32-bit integers overflows.
Operands:
Effect: src2 = src2 - src1; branch if signed overflow
Syntax: bsubis <gpr>, <gpr>, <label>
Description: Branch if subtract of 32-bit integers sets sign flag.
Operands:
Effect: src2 = src2 - src1; branch if result < 0
Syntax: bsubiz <gpr>, <gpr>, <label>
Description: Branch if subtract of 32-bit integers results in zero.
Operands:
Effect: src2 = src2 - src1; branch if result == 0
Syntax: bsubinz <gpr>, <gpr>, <label>
Description: Branch if subtract of 32-bit integers results in non-zero.
Operands:
Effect: src2 = src2 - src1; branch if result != 0
Syntax: btbs <gpr>, <imm>, <label>
Description: Branch and test byte if sign bit is set.
Operands:
Effect: Branch if (src & mask) < 0 (sign bit of masked result is set)
Syntax: btbz <gpr>, <imm>, <label>
Description: Branch and test byte if zero.
Operands:
Effect: Branch if (src & mask) == 0
Syntax: btbnz <gpr>, <imm>, <label>
Description: Branch and test byte if not zero.
Operands:
Effect: Branch if (src & mask) != 0
Syntax: btd2i <fpr>, <gpr>, <label>
Description: Branch if truncate double to int fails, otherwise convert.
Operands:
Effect: Convert double to 32-bit int; branch if out of range
Syntax: btis <gpr>, <imm>, <label>
Description: Branch and test 32-bit integer if sign bit is set.
Operands:
Effect: Branch if (src & mask) < 0
Syntax: btiz <gpr>, <imm>, <label>
Description: Branch and test 32-bit integer if zero.
Operands:
Effect: Branch if (src & mask) == 0
Syntax: btinz <gpr>, <imm>, <label>
Description: Branch and test 32-bit integer if not zero.
Operands:
Effect: Branch if (src & mask) != 0
Example Usage:
btinz t0, 0x1, .isOdd # Branch if low bit is set
Syntax: btps <gpr>, <imm>, <label>
Description: Branch and test pointer if sign bit is set.
Operands:
Effect: Branch if (src & mask) < 0
Syntax: btpz <gpr>, <imm>, <label>
Description: Branch and test pointer if zero.
Operands:
Effect: Branch if (src & mask) == 0
Syntax: btpnz <gpr>, <imm>, <label>
Description: Branch and test pointer if not zero.
Operands:
Effect: Branch if (src & mask) != 0
Syntax: btqs <gpr>, <imm>, <label>
Description: Branch and test 64-bit integer if sign bit is set.
Operands:
Effect: Branch if (src & mask) < 0
Syntax: btqz <gpr>, <imm>, <label>
Description: Branch and test 64-bit integer if zero.
Operands:
Effect: Branch if (src & mask) == 0
Syntax: btqnz <gpr>, <imm>, <label>
Description: Branch and test 64-bit integer if not zero.
Operands:
Effect: Branch if (src & mask) != 0
Syntax: bz <label>
Description: Branch if zero flag is set.
Operands:
Effect: Branch based on previous operation's zero flag
Syntax: bnz <label>
Description: Branch if zero flag is not set.
Operands:
Effect: Branch based on previous operation's zero flag
Syntax: call <label|gpr>
Description: Call a function.
Operands:
Effect: Push return address, jump to target
ARM64 Translation: bl <label> or blr <register>
Syntax: cbeq <gpr>, <gpr|imm>, <gpr>
Description: Compare bytes and set destination to 1 if equal, 0 otherwise.
Operands:
Effect: dest = (src1 == src2) ? 1 : 0
Syntax: cbneq <gpr>, <gpr|imm>, <gpr>
Description: Compare bytes and set destination to 1 if not equal.
Operands:
Effect: dest = (src1 != src2) ? 1 : 0
Syntax: cba <gpr>, <gpr|imm>, <gpr>
Description: Compare bytes (unsigned >) and set boolean result.
Operands:
Effect: dest = (src1 > src2) ? 1 : 0 (unsigned)
Syntax: cbaeq <gpr>, <gpr|imm>, <gpr>
Description: Compare bytes (unsigned >=) and set boolean result.
Operands:
Effect: dest = (src1 >= src2) ? 1 : 0 (unsigned)
Syntax: cbb <gpr>, <gpr|imm>, <gpr>
Description: Compare bytes (unsigned <) and set boolean result.
Operands:
Effect: dest = (src1 < src2) ? 1 : 0 (unsigned)
Syntax: cbbeq <gpr>, <gpr|imm>, <gpr>
Description: Compare bytes (unsigned <=) and set boolean result.
Operands:
Effect: dest = (src1 <= src2) ? 1 : 0 (unsigned)
Syntax: cbgt <gpr>, <gpr|imm>, <gpr>
Description: Compare signed bytes (>) and set boolean result.
Operands:
Effect: dest = (src1 > src2) ? 1 : 0 (signed)
Syntax: cbgteq <gpr>, <gpr|imm>, <gpr>
Description: Compare signed bytes (>=) and set boolean result.
Operands:
Effect: dest = (src1 >= src2) ? 1 : 0 (signed)
Syntax: cblt <gpr>, <gpr|imm>, <gpr>
Description: Compare signed bytes (<) and set boolean result.
Operands:
Effect: dest = (src1 < src2) ? 1 : 0 (signed)
Syntax: cblteq <gpr>, <gpr|imm>, <gpr>
Description: Compare signed bytes (<=) and set boolean result.
Operands:
Effect: dest = (src1 <= src2) ? 1 : 0 (signed)
Syntax: cd2f <fpr>, <fpr>
Description: Convert double to float.
Operands:
Effect: dest_float = (float)src_double
Syntax: cdeq <fpr>, <fpr>, <gpr>
Description: Compare doubles and set destination to 1 if equal.
Operands:
Effect: dest = (src1 == src2) ? 1 : 0
Syntax: cdlt <fpr>, <fpr>, <gpr>
Description: Compare doubles (<) and set boolean result.
Operands:
Effect: dest = (src1 < src2) ? 1 : 0
Syntax: cdlteq <fpr>, <fpr>, <gpr>
Description: Compare doubles (<=) and set boolean result.
Operands:
Effect: dest = (src1 <= src2) ? 1 : 0
Syntax: cdgt <fpr>, <fpr>, <gpr>
Description: Compare doubles (>) and set boolean result.
Operands:
Effect: dest = (src1 > src2) ? 1 : 0
Syntax: cdgteq <fpr>, <fpr>, <gpr>
Description: Compare doubles (>=) and set boolean result.
Operands:
Effect: dest = (src1 >= src2) ? 1 : 0
Syntax: cdneq <fpr>, <fpr>, <gpr>
Description: Compare doubles and set destination to 1 if not equal.
Operands:
Effect: dest = (src1 != src2) ? 1 : 0
Syntax: cdnequn <fpr>, <fpr>, <gpr>
Description: Compare doubles (unordered !=) and set boolean result.
Operands:
Effect: dest = (src1 != src2 || isNaN(src1) || isNaN(src2)) ? 1 : 0
Syntax: ceil{d|f} <src>, <dest>
Description: Ceiling function (round toward +infinity).
Variants:
ceild - double-precision floatceilf - single-precision floatOperands:
Effect: dest = ceil(src)
ARM64 Translation: frintp with appropriate size specifier
Syntax: cf2d <fpr>, <fpr>
Description: Convert float to double.
Operands:
Effect: dest_double = (double)src_float
Syntax: cfeq <fpr>, <fpr>, <gpr>
Description: Compare floats and set destination to 1 if equal.
Operands:
Effect: dest = (src1 == src2) ? 1 : 0
Syntax: cflt <fpr>, <fpr>, <gpr>
Description: Compare floats (<) and set boolean result.
Operands:
Effect: dest = (src1 < src2) ? 1 : 0
Syntax: cflteq <fpr>, <fpr>, <gpr>
Description: Compare floats (<=) and set boolean result.
Operands:
Effect: dest = (src1 <= src2) ? 1 : 0
Syntax: cfgt <fpr>, <fpr>, <gpr>
Description: Compare floats (>) and set boolean result.
Operands:
Effect: dest = (src1 > src2) ? 1 : 0
Syntax: cfgteq <fpr>, <fpr>, <gpr>
Description: Compare floats (>=) and set boolean result.
Operands:
Effect: dest = (src1 >= src2) ? 1 : 0
Syntax: cfneq <fpr>, <fpr>, <gpr>
Description: Compare floats and set destination to 1 if not equal.
Operands:
Effect: dest = (src1 != src2) ? 1 : 0
Syntax: cfnequn <fpr>, <fpr>, <gpr>
Description: Compare floats (unordered !=) and set boolean result.
Operands:
Effect: dest = (src1 != src2 || isNaN(src1) || isNaN(src2)) ? 1 : 0
Syntax: ci2{d|ds|f|fs} <src>, <dest>
Description: Convert signed 32-bit integer to floating-point.
Variants:
ci2d - to double-precisionci2ds - to double-precision with saturationci2f - to single-precisionci2fs - to single-precision with saturationOperands:
Effect: dest_float = (float_type)src_int
ARM64 Translation: scvtf with appropriate size specifier
Syntax: cieq <gpr>, <gpr|imm>, <gpr>
Description: Compare 32-bit integers and set destination to 1 if equal.
Operands:
Effect: dest = (src1 == src2) ? 1 : 0
Syntax: cineq <gpr>, <gpr|imm>, <gpr>
Description: Compare 32-bit integers and set destination to 1 if not equal.
Operands:
Effect: dest = (src1 != src2) ? 1 : 0
Syntax: cia <gpr>, <gpr|imm>, <gpr>
Description: Compare integers (unsigned >) and set boolean result.
Operands:
Effect: dest = (src1 > src2) ? 1 : 0 (unsigned)
Syntax: ciaeq <gpr>, <gpr|imm>, <gpr>
Description: Compare integers (unsigned >=) and set boolean result.
Operands:
Effect: dest = (src1 >= src2) ? 1 : 0 (unsigned)
Syntax: cib <gpr>, <gpr|imm>, <gpr>
Description: Compare integers (unsigned <) and set boolean result.
Operands:
Effect: dest = (src1 < src2) ? 1 : 0 (unsigned)
Syntax: cibeq <gpr>, <gpr|imm>, <gpr>
Description: Compare integers (unsigned <=) and set boolean result.
Operands:
Effect: dest = (src1 <= src2) ? 1 : 0 (unsigned)
Syntax: cigt <gpr>, <gpr|imm>, <gpr>
Description: Compare signed integers (>) and set boolean result.
Operands:
Effect: dest = (src1 > src2) ? 1 : 0 (signed)
Syntax: cigteq <gpr>, <gpr|imm>, <gpr>
Description: Compare signed integers (>=) and set boolean result.
Operands:
Effect: dest = (src1 >= src2) ? 1 : 0 (signed)
Syntax: cilt <gpr>, <gpr|imm>, <gpr>
Description: Compare signed integers (<) and set boolean result.
Operands:
Effect: dest = (src1 < src2) ? 1 : 0 (signed)
Syntax: cilteq <gpr>, <gpr|imm>, <gpr>
Description: Compare signed integers (<=) and set boolean result.
Operands:
Effect: dest = (src1 <= src2) ? 1 : 0 (signed)
Syntax: cpeq <gpr>, <gpr|imm>, <gpr>
Description: Compare pointers and set destination to 1 if equal.
Operands:
Effect: dest = (src1 == src2) ? 1 : 0
Syntax: cpneq <gpr>, <gpr|imm>, <gpr>
Description: Compare pointers and set destination to 1 if not equal.
Operands:
Effect: dest = (src1 != src2) ? 1 : 0
Syntax: cpa <gpr>, <gpr|imm>, <gpr>
Description: Compare pointers (unsigned >) and set boolean result.
Operands:
Effect: dest = (src1 > src2) ? 1 : 0 (unsigned)
Syntax: cpaeq <gpr>, <gpr|imm>, <gpr>
Description: Compare pointers (unsigned >=) and set boolean result.
Operands:
Effect: dest = (src1 >= src2) ? 1 : 0 (unsigned)
Syntax: cpb <gpr>, <gpr|imm>, <gpr>
Description: Compare pointers (unsigned <) and set boolean result.
Operands:
Effect: dest = (src1 < src2) ? 1 : 0 (unsigned)
Syntax: cpbeq <gpr>, <gpr|imm>, <gpr>
Description: Compare pointers (unsigned <=) and set boolean result.
Operands:
Effect: dest = (src1 <= src2) ? 1 : 0 (unsigned)
Syntax: cpgt <gpr>, <gpr|imm>, <gpr>
Description: Compare signed pointers (>) and set boolean result.
Operands:
Effect: dest = (src1 > src2) ? 1 : 0 (signed)
Syntax: cpgteq <gpr>, <gpr|imm>, <gpr>
Description: Compare signed pointers (>=) and set boolean result.
Operands:
Effect: dest = (src1 >= src2) ? 1 : 0 (signed)
Syntax: cplt <gpr>, <gpr|imm>, <gpr>
Description: Compare signed pointers (<) and set boolean result.
Operands:
Effect: dest = (src1 < src2) ? 1 : 0 (signed)
Syntax: cplteq <gpr>, <gpr|imm>, <gpr>
Description: Compare signed pointers (<=) and set boolean result.
Operands:
Effect: dest = (src1 <= src2) ? 1 : 0 (signed)
Syntax: cq2{d|ds|f|fs} <src>, <dest>
Description: Convert signed 64-bit integer to floating-point.
Variants:
cq2d - to double-precisioncq2ds - to double-precision with saturationcq2f - to single-precisioncq2fs - to single-precision with saturationOperands:
Effect: dest_float = (float_type)src_int64
Syntax: cqeq <gpr>, <gpr|imm>, <gpr>
Description: Compare 64-bit integers and set destination to 1 if equal.
Operands:
Effect: dest = (src1 == src2) ? 1 : 0
Syntax: cqneq <gpr>, <gpr|imm>, <gpr>
Description: Compare 64-bit integers and set destination to 1 if not equal.
Operands:
Effect: dest = (src1 != src2) ? 1 : 0
Syntax: cqa <gpr>, <gpr|imm>, <gpr>
Description: Compare 64-bit integers (unsigned >) and set boolean result.
Operands:
Effect: dest = (src1 > src2) ? 1 : 0 (unsigned)
Syntax: cqaeq <gpr>, <gpr|imm>, <gpr>
Description: Compare 64-bit integers (unsigned >=) and set boolean result.
Operands:
Effect: dest = (src1 >= src2) ? 1 : 0 (unsigned)
Syntax: cqb <gpr>, <gpr|imm>, <gpr>
Description: Compare 64-bit integers (unsigned <) and set boolean result.
Operands:
Effect: dest = (src1 < src2) ? 1 : 0 (unsigned)
Syntax: cqbeq <gpr>, <gpr|imm>, <gpr>
Description: Compare 64-bit integers (unsigned <=) and set boolean result.
Operands:
Effect: dest = (src1 <= src2) ? 1 : 0 (unsigned)
Syntax: cqgt <gpr>, <gpr|imm>, <gpr>
Description: Compare signed 64-bit integers (>) and set boolean result.
Operands:
Effect: dest = (src1 > src2) ? 1 : 0 (signed)
Syntax: cqgteq <gpr>, <gpr|imm>, <gpr>
Description: Compare signed 64-bit integers (>=) and set boolean result.
Operands:
Effect: dest = (src1 >= src2) ? 1 : 0 (signed)
Syntax: cqlt <gpr>, <gpr|imm>, <gpr>
Description: Compare signed 64-bit integers (<) and set boolean result.
Operands:
Effect: dest = (src1 < src2) ? 1 : 0 (signed)
Syntax: cqlteq <gpr>, <gpr|imm>, <gpr>
Description: Compare signed 64-bit integers (<=) and set boolean result.
Operands:
Effect: dest = (src1 <= src2) ? 1 : 0 (signed)
Syntax: div{d|f} <src>, <dest> or div{d|f} <src1>, <src2>, <dest>
Description: Divide floating-point numbers.
Variants:
divd - double-precision floatsdivf - single-precision floatsOperands:
Effect: dest = src1 / src2
ARM64 Translation: fdiv with appropriate size specifier
Syntax: emit <string>
Description: Emit raw assembly code.
Operands:
Effect: Emits the string directly to the output assembly
Example Usage:
emit "nop"
Syntax: fd2ii <fpr>, <gpr>, <gpr>
Description: Convert double to two 32-bit integers (LSB and MSB).
Operands:
Effect: Extracts the 64-bit double bit pattern into two 32-bit registers
Syntax: fd2q <fpr>, <gpr>
Description: Move double-precision float bit pattern to 64-bit integer register.
Operands:
Effect: dest_int64 = bitcast<int64>(src_double)
ARM64 Translation: fmov x<dest>, d<src>
Syntax: fi2f <gpr>, <fpr>
Description: Move 32-bit integer bit pattern to float register.
Operands:
Effect: dest_float = bitcast<float>(src_int32)
Syntax: fii2d <gpr>, <gpr>, <fpr>
Description: Combine two 32-bit integers into a double.
Operands:
Effect: Combines two 32-bit integers into a 64-bit double bit pattern
Syntax: ff2i <fpr>, <gpr>
Description: Move float bit pattern to 32-bit integer register.
Operands:
Effect: dest_int32 = bitcast<int32>(src_float)
Syntax: floor{d|f} <src>, <dest>
Description: Floor function (round toward -infinity).
Variants:
floord - double-precision floatfloorf - single-precision floatOperands:
Effect: dest = floor(src)
ARM64 Translation: frintm with appropriate size specifier
Syntax: fq2d <gpr>, <fpr>
Description: Move 64-bit integer bit pattern to double-precision float register.
Operands:
Effect: dest_double = bitcast<double>(src_int64)
ARM64 Translation: fmov d<dest>, x<src>
Syntax: jmp <label|gpr>
Description: Unconditional jump.
Operands:
Effect: Jump to target address
Example Usage:
jmp .done jmp t0
ARM64 Translation: b <label> or br <register>
Syntax: leai <address>, <gpr>
Description: Load effective address (32-bit).
Operands:
Effect: dest = address_of(src) (calculates address without loading)
Example Usage:
leai [t0, 16], t1 # t1 = t0 + 16
Syntax: leap <address>, <gpr>
Description: Load effective address (pointer-sized).
Operands:
Effect: dest = address_of(src)
Example Usage:
leap [cfr, 8], t0 # t0 = cfr + 8
ARM64 Translation: add x<dest>, x<base>, #<offset>
Syntax: load2ia <address>, <gpr>, <gpr>
Description: Load two adjacent 32-bit integers.
Operands:
Effect: Loads two consecutive 32-bit values
Syntax: loadb <address>, <gpr> or loadbs{i|q} <address>, <gpr>
Description: Load 8-bit byte from memory.
Variants:
loadb - unsigned byte, zero-extendloadbsi - signed byte, sign-extend to 32-bitloadbsq - signed byte, sign-extend to 64-bitOperands:
Effect: dest = load_byte(address) with appropriate extension
ARM64 Translation: ldrb/ldrsb with appropriate size specifier
Syntax: load{d|f|i|is|p|q|v} <address>, <dest>
Description: Load value from memory.
Variants:
loadd - double-precision float (FPR destination)loadf - single-precision float (FPR destination)loadi - 32-bit integer (GPR destination)loadis - 32-bit integer, sign-extend to pointer/64-bit (GPR destination)loadp - pointer-sized value (GPR destination)loadq - 64-bit integer (GPR destination)loadv - 128-bit vector/SIMD (vector register destination)Operands:
Effect: dest = value[address]
Example Usage:
loadi [t0], t1 # Load from [t0] loadi [cfr, 16], t2 # Load from [cfr + 16] loadi [t0, t1, 4], t2 # Load from [t0 + t1*16] (scale=4 means shift by 4)
ARM64 Translation: ldr with appropriate size specifier
Syntax: loadh <address>, <gpr> or loadhs{i|q} <address>, <gpr>
Description: Load 16-bit half-word from memory.
Variants:
loadh - unsigned half-word, zero-extendloadhsi - signed half-word, sign-extend to 32-bitloadhsq - signed half-word, sign-extend to 64-bitOperands:
Effect: dest = load_halfword(address) with appropriate extension
ARM64 Translation: ldrh/ldrsh with appropriate size specifier
Syntax: lrotate{i|q} <count>, <dest>
Description: Rotate integer left.
Variants:
lrotatei - 32-bit integerslrotateq - 64-bit integersOperands:
Effect: dest = rotate_left(dest, count)
Syntax: lshift{i|p|q} <count>, <dest> or lshift{i|p|q} <count>, <src>, <dest>
Description: Logical shift left integer.
Variants:
lshifti - 32-bit integerslshiftp - pointer-sized integerslshiftq - 64-bit integersOperands:
Effect: dest = src << count
Example Usage:
lshifti 2, t0 # t0 = t0 << 2 lshifti t1, t0, t2 # t2 = t0 << t1
ARM64 Translation: lsl with appropriate size specifier
Syntax: lzcnt{i|q} <src>, <dest>
Description: Count leading zeros in integer.
Variants:
lzcnti - 32-bit integerslzcntq - 64-bit integersOperands:
Effect: dest = count_leading_zeros(src)
ARM64 Translation: clz with appropriate size specifier
Syntax: memfence
Description: Memory fence/barrier.
Effect: Ensures memory operations before the fence complete before operations after
ARM64 Translation: dmb ish or similar
Syntax: move <src>, <dest>
Description: Move value between registers or load immediate.
Operands:
Effect: dest = src
Example Usage:
move 42, t0 # t0 = 42 move t1, t0 # t0 = t1
ARM64 Translation: mov x<dest>, x<src> or mov x<dest>, #<imm>
Syntax: moved <fpr>, <fpr>
Description: Move double-precision float between FP registers.
Operands:
Effect: dest = src
ARM64 Translation: fmov d<dest>, d<src>
Syntax: movdz <fpr>, <fpr>
Description: Move double or set to zero if source is -0.0.
Operands:
Effect: dest = (src == -0.0) ? 0.0 : src
Syntax: mul{d|f|i|p|q} <src>, <dest> or mul{d|f|i|p|q} <src1>, <src2>, <dest>
Description: Multiply two values.
Variants:
muld - double-precision floats (FPR operands)mulf - single-precision floats (FPR operands)muli - 32-bit integers (GPR operands, immediate or GPR source)mulp - pointer-sized integers (GPR operands, immediate or GPR source)mulq - 64-bit integers (GPR operands, immediate or GPR source)Operands:
Effect: dest = src1 * src2
ARM64 Translation: mul/fmul with appropriate size specifier
Syntax: neg{d|f} <src>, <dest> or neg{i|p|q} <dest>
Description: Negate a value.
Variants:
negd - double-precision floats (2 operands: source FPR, dest FPR)negf - single-precision floats (2 operands: source FPR, dest FPR)negi - 32-bit integers (1 operand: dest GPR, in-place)negp - pointer-sized integers (1 operand: dest GPR, in-place)negq - 64-bit integers (1 operand: dest GPR, in-place)Effect: dest = -src (floats) or dest = -dest (integers)
ARM64 Translation: neg/fneg with appropriate size specifier
Syntax: nop
Description: No operation.
Effect: Does nothing, used for padding or alignment
ARM64 Translation: nop
Syntax: noti <gpr>
Description: Bitwise NOT of 32-bit integer.
Operands:
Effect: dest = ~dest
Note: See also notq in architecture-specific instructions for 64-bit variant.
ARM64 Translation: mvn w<dest>, w<src>
Syntax: or{d|f|h|i|p|q} <src>, <dest> or or{i|p|q} <src1>, <src2>, <dest>
Description: Bitwise OR of values.
Variants:
ord - double-precision float bit patterns (FPR operands)orf - single-precision float bit patterns (FPR operands)orh - 16-bit half-words (GPR operands, immediate or GPR source)ori - 32-bit integers (GPR operands, immediate or GPR source)orp - pointer-sized integers (GPR operands, immediate or GPR source)orq - 64-bit integers (GPR operands, immediate or GPR source)Operands:
Effect: dest = src1 | src2
ARM64 Translation: orr with appropriate size specifier
Syntax: peek <imm>, <gpr|fpr>
Description: Read value from stack at offset.
Operands:
Effect: dest = stack[sp + offset * sizeof(ptr)]
Example Usage:
peek 2, t0 # Load from [sp + 16] (on 64-bit)
Syntax: poke <gpr|fpr|imm>, <imm>
Description: Write value to stack at offset.
Operands:
Effect: stack[sp + offset * sizeof(ptr)] = src
Example Usage:
poke t0, 2 # Store to [sp + 16] poke 0, 1 # Store 0 to [sp + 8]
Syntax: pop <gpr>
Description: Pop value from stack.
Operands:
Effect: dest = [sp]; sp = sp + sizeof(ptr)
ARM64 Translation: ldr x<dest>, [sp], #8
Syntax: popv <vecreg>
Description: Pop 128-bit vector from stack.
Operands:
Effect: dest = [sp]; sp = sp + 16
Syntax: push <gpr>
Description: Push value onto stack.
Operands:
Effect: sp = sp - sizeof(ptr); [sp] = src
ARM64 Translation: str x<src>, [sp, #-8]!
Syntax: pushv <vecreg>
Description: Push 128-bit vector onto stack.
Operands:
Effect: sp = sp - 16; [sp] = src
Syntax: removeArrayPtrTag <gpr>
Description: Remove pointer authentication code from array pointer.
Operands:
Effect: Strips PAC from pointer (ARM64e specific)
Syntax: removeCodePtrTag <gpr>
Description: Strip pointer authentication information from code pointer without authenticating its value. (ARM64e specific, no effect on other platforms).
Operands:
ARM64E Translation: xpaci <gpr>
Syntax: ret
Description: Return from function.
Effect: ARM64E only: authenticate the return address in the lr register using the IB key and sp as the discriminator, then jump to it if authentication succeeds. Other architectures: pop the return address and jump to it.
ARM64E Translation: retab
Syntax: round{d|f} <src>, <dest>
Description: Round to nearest integer (ties to even).
Variants:
roundd - double-precision floatroundf - single-precision floatOperands:
Effect: dest = round(src)
ARM64 Translation: frintn with appropriate size specifier
Syntax: rrotate{i|q} <count>, <dest>
Description: Rotate integer right.
Variants:
rrotatei - 32-bit integersrrotateq - 64-bit integersOperands:
Effect: dest = rotate_right(dest, count)
Syntax: rshift{i|p|q} <count>, <dest> or rshift{i|p|q} <count>, <src>, <dest>
Description: Arithmetic (signed) shift right integer.
Variants:
rshifti - 32-bit integersrshiftp - pointer-sized integersrshiftq - 64-bit integersOperands:
Effect: dest = src >> count (sign-extending)
ARM64 Translation: asr with appropriate size specifier
Syntax: sqrt{d|f} <src>, <dest>
Description: Square root of floating-point number.
Variants:
sqrtd - double-precision floatsqrtf - single-precision floatOperands:
Effect: dest = sqrt(src)
ARM64 Translation: fsqrt with appropriate size specifier
Syntax: store2ia <gpr>, <gpr>, <address>
Description: Store two adjacent 32-bit integers.
Operands:
Effect: Stores two consecutive 32-bit values
Syntax: store{b|d|f|h|i|p|q|v} <src>, <address>
Description: Store value to memory.
Variants:
storeb - 8-bit byte (GPR or immediate source)stored - double-precision float (FPR source)storef - single-precision float (FPR source)storeh - 16-bit half-word (GPR or immediate source)storei - 32-bit integer (GPR or immediate source)storep - pointer-sized value (GPR or immediate source)storeq - 64-bit integer (GPR or immediate source)storev - 128-bit vector/SIMD (vector register source)Operands:
Effect: memory[address] = src
Example Usage:
storei t0, [t1] # Store t0 to [t1] storei 42, [cfr, 8] # Store constant to [cfr + 8]
ARM64 Translation: str with appropriate size specifier
Syntax: sub{d|f|i|p|q} <src>, <dest> or sub{d|f|i|p|q} <src1>, <src2>, <dest>
Description: Subtract two values.
Variants:
subd - double-precision floats (FPR operands)subf - single-precision floats (FPR operands)subi - 32-bit integers (GPR operands, immediate or GPR source)subp - pointer-sized integers (GPR operands, immediate or GPR source)subq - 64-bit integers (GPR operands, immediate or GPR source)Operands:
Effect: dest = src1 - src2 (3-operand) or dest = dest - src (2-operand)
ARM64 Translation: sub/fsub with appropriate size specifier
Syntax: sxb2{i|p|q} <src>, <dest>
Description: Sign-extend byte to larger integer size.
Variants:
sxb2i - byte to 32-bit integersxb2p - byte to pointer sizesxb2q - byte to 64-bit integerOperands:
Effect: dest = sign_extend(src & 0xff)
ARM64 Translation: sxtb with appropriate size specifier
Syntax: sxh2{i|q} <src>, <dest>
Description: Sign-extend half-word to larger integer size.
Variants:
sxh2i - half-word to 32-bit integersxh2q - half-word to 64-bit integerOperands:
Effect: dest = sign_extend(src & 0xffff)
ARM64 Translation: sxth with appropriate size specifier
Syntax: sxi2q <gpr>, <gpr>
Description: Sign-extend 32-bit integer to 64-bit.
Operands:
Effect: dest = sign_extend_64(src)
ARM64 Translation: sxtw x<dest>, w<src>
Base Syntax: tagCodePtr <gpr1>, <gpr2>
Description: Sign a code pointer in a register using the IB key and a discriminator in another register. (ARM64e specific).
Operands:
ARM64E translation: pacib <gpr1> <gpr2>
Expanded Syntax: tagCodePtr <gpr1>, <imm1>, <imm2>, <gpr2>
Description: Sign a code pointer in a register using the IB key and a discriminator created by combining a constant tag and the value of another register.
Operands:
AddressDiversified (numeric value 1).Effect: Expands into the following sequence of offlineasm instructions:
move (imm1 << 48), tempGPR xorp gpr2, tempGPR tagCodePtr gpr1, tempGPR
Syntax: tagReturnAddress <reg>
Description: Sign the address in the lr register using the IB key and another register value as a discriminator. (ARM64e specific).
Operands:
spARM64E Translation: pacibsp or pacib lr, GPR
Syntax: tbs <gpr>, <imm>, <gpr>
Description: Test byte and set destination to 1 if sign bit is set.
Operands:
Effect: dest = ((src & mask) < 0) ? 1 : 0
Syntax: tbz <gpr>, <imm>, <gpr>
Description: Test byte and set destination to 1 if zero.
Operands:
Effect: dest = ((src & mask) == 0) ? 1 : 0
Syntax: tbnz <gpr>, <imm>, <gpr>
Description: Test byte and set destination to 1 if not zero.
Operands:
Effect: dest = ((src & mask) != 0) ? 1 : 0
Syntax: td2i <fpr>, <gpr>
Description: Truncate double to signed 32-bit integer.
Operands:
Effect: dest = (int32)src (truncates toward zero)
ARM64 Translation: fcvtzs w<dest>, d<src>
Syntax: tis <gpr>, <imm>, <gpr>
Description: Test 32-bit integer and set destination to 1 if sign bit is set.
Operands:
Effect: dest = ((src & mask) < 0) ? 1 : 0
Syntax: tiz <gpr>, <imm>, <gpr>
Description: Test 32-bit integer and set destination to 1 if zero.
Operands:
Effect: dest = ((src & mask) == 0) ? 1 : 0
Syntax: tinz <gpr>, <imm>, <gpr>
Description: Test 32-bit integer and set destination to 1 if not zero.
Operands:
Effect: dest = ((src & mask) != 0) ? 1 : 0
Syntax: tps <gpr>, <imm>, <gpr>
Description: Test pointer and set destination to 1 if sign bit is set.
Operands:
Effect: dest = ((src & mask) < 0) ? 1 : 0
Syntax: tpz <gpr>, <imm>, <gpr>
Description: Test pointer and set destination to 1 if zero.
Operands:
Effect: dest = ((src & mask) == 0) ? 1 : 0
Syntax: tpnz <gpr>, <imm>, <gpr>
Description: Test pointer and set destination to 1 if not zero.
Operands:
Effect: dest = ((src & mask) != 0) ? 1 : 0
Syntax: tqs <gpr>, <imm>, <gpr>
Description: Test 64-bit integer and set destination to 1 if sign bit is set.
Operands:
Effect: dest = ((src & mask) < 0) ? 1 : 0
Syntax: tqz <gpr>, <imm>, <gpr>
Description: Test 64-bit integer and set destination to 1 if zero.
Operands:
Effect: dest = ((src & mask) == 0) ? 1 : 0
Syntax: tqnz <gpr>, <imm>, <gpr>
Description: Test 64-bit integer and set destination to 1 if not zero.
Operands:
Effect: dest = ((src & mask) != 0) ? 1 : 0
Syntax: transfer{i|p|q} <src>, <dest>
Description: Transfer/move value between GPRs (alias for move).
Variants:
transferi - 32-bit valuestransferp - pointer-sized valuestransferq - 64-bit valuesOperands:
Effect: dest = src
Syntax: truncate{d|f} <src>, <dest>
Description: Truncate float to integer value (result stays as float type).
Variants:
truncated - double-precisiontruncatef - single-precisionOperands:
Effect: dest = trunc(src) (removes fractional part)
ARM64 Translation: frintz with appropriate size specifier
Syntax: truncated2{i|is|q|qs} <src>, <dest>
Description: Truncate double to signed integer.
Variants:
truncated2i - to 32-bit integertruncated2is - to 32-bit integer with saturationtruncated2q - to 64-bit integertruncated2qs - to 64-bit integer with saturationOperands:
Effect: dest = (int)src (truncates toward zero)
ARM64 Translation: fcvtzs with appropriate size specifier
Syntax: truncatef2{i|is|q|qs} <src>, <dest>
Description: Truncate float to signed integer.
Variants:
truncatef2i - to 32-bit integertruncatef2is - to 32-bit integer with saturationtruncatef2q - to 64-bit integertruncatef2qs - to 64-bit integer with saturationOperands:
Effect: dest = (int)src (truncates toward zero)
Syntax: tzcnt{i|q} <src>, <dest>
Description: Count trailing zeros in integer.
Variants:
tzcnti - 32-bit integerstzcntq - 64-bit integersOperands:
Effect: dest = count_trailing_zeros(src)
ARM64 Translation: rbit + clz (reverse bits then count leading zeros)
Syntax: untagArrayPtr <gpr>
Description: Remove pointer authentication and untag array pointer (ARM64e).
Syntax: untagReturnAddress <reg>
Description: Remove the PAC signature from the value in the lr register if it successfully authenticates using the IB key and the value of the specified GPR or sp as the discriminator. (ARM64e specific).
Operands:
sp containing the discriminator valueARM64E Translation: autibsp or autib lr, GPR
Syntax: urshift{i|p|q} <count>, <dest> or urshift{i|p|q} <count>, <src>, <dest>
Description: Logical (unsigned) shift right integer.
Variants:
urshifti - 32-bit integersurshiftp - pointer-sized integersurshiftq - 64-bit integersOperands:
Effect: dest = src >> count (zero-extending)
ARM64 Translation: lsr with appropriate size specifier
Syntax: xor{i|p|q} <src>, <dest> or xor{i|p|q} <src1>, <src2>, <dest>
Description: Bitwise XOR of integers.
Variants:
xori - 32-bit integers (immediate or GPR source)xorp - pointer-sized integers (immediate or GPR source)xorq - 64-bit integers (immediate or GPR source)Operands:
Effect: dest = src1 ^ src2
ARM64 Translation: eor with appropriate size specifier
Syntax: zxi2q <gpr>, <gpr>
Description: Zero-extend 32-bit integer to 64-bit.
Operands:
Effect: dest = zero_extend_64(src)
ARM64 Translation: mov w<dest>, w<src> (implicit zero-extension on ARM64)
Syntax: bfiq <gpr>, <imm>, <imm>, <gpr>
Description: Bit field insert.
Operands:
ARM64 Translation: bfi or bfxil
Syntax: fence
Description: Full memory fence.
ARM64 Translation: dmb sy
Syntax: globaladdr <label>, <gpr>
Description: Load global address into register.
Syntax: loadlinkacq{b|h|i|q} <address>, <gpr>
Description: Load-link with acquire semantics (for atomic operations).
ARM64 Translation: ldaxrb/ldaxrh/ldaxr/ldaxr
Syntax: notq <gpr>
Description: Bitwise NOT of 64-bit integer.
ARM64 Translation: mvn x<dest>, x<src>
Syntax: storecondrel{b|h|i|q} <gpr>, <address>, <gpr>
Description: Store-conditional with release semantics.
ARM64 Translation: stlxrb/stlxrh/stlxr/stlxr
t0-t12 - Temporary registerscfr - C frame register (x29/fp)csr0-csr9 - Callee-saved registerssp - Stack pointerlr - Link register (return address)ft0-ft7 - Temporary FP registerscsfr0-csfr7 - Callee-saved FP registersv0-v7 - Vector registersv0_b, v0_h, v0_i, v0_q - Vector with element size interpretationOperand Order: Generally follows AT&T syntax for multi-operand instructions: operation source, destination or operation src1, src2, dest for 3-operand forms.
Address Modes:
[base] - Register indirect[base, offset] - Register + immediate offset[base, index, scale] - Register + scaled index (BaseIndex)Immediate Values: Prefixed with # in actual assembly output, but written without prefix in offlineasm source.
Conditional Suffixes:
eq - Equalneq - Not equala - Above (unsigned >)aeq - Above or equal (unsigned >=)b - Below (unsigned <)beq - Below or equal (unsigned <=)gt - Greater than (signed >)gteq - Greater or equal (signed >=)lt - Less than (signed <)lteq - Less or equal (signed <=)z - Zeronz - Not zeros - Sign (negative)o - OverflowFloating-Point Comparisons:
bdeq, bdlt, etc.) - Branch if comparison is true AND neither operand is NaNbdequn, bdltun, etc.) - Branch if comparison is true OR either operand is NaNThis reference covers the main MACRO_INSTRUCTIONS used across all platforms. Architecture-specific instructions (X86_INSTRUCTIONS, ARM_INSTRUCTIONS, etc.) are used for platform-specific optimizations and are translated directly to native instructions.