)]}'
{
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        "time": "Fri Oct 02 05:21:31 2026"
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        "time": "Fri Oct 02 05:23:53 2026"
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      "message": "Internal change\n\nLiteRT-PiperOrigin-RevId: 992109294\n"
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        "time": "Fri Oct 02 01:51:28 2026"
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        "time": "Fri Oct 02 01:53:16 2026"
      },
      "message": "Clean up `runner_test_suite.h`\n\n- Use status and container matchers.\n- Use runner `ReadOutputAs()` instead of manually converting using\n  `ReadOutput()` and `As()`.\n- Add a `SetInputAsCopy` overload from an initializer list.\n\nLiteRT-PiperOrigin-RevId: 992037216\n"
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        "time": "Fri Oct 02 00:54:30 2026"
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        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 22:40:57 2026"
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      "message": "Rename `LiteRtStaticLinkedAcceleratorCpuDef` to `LiteRtStaticLinkedAcceleratorXnnpackDef` and remove `__attribute__((weak))` from `RegisterCpuAccelerator`.\n\nLiteRT-PiperOrigin-RevId: 991945080\n"
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        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 22:33:08 2026"
      },
      "message": "Update CODEOWNERS file to include a url link pointing to github team\n\nLiteRT-PiperOrigin-RevId: 991940983\n"
    },
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      "message": "Merge pull request #10448 from graham0824:dev/hungjuiw/fix-addn-test2\n\nLiteRT-PiperOrigin-RevId: 991926752\n"
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      "author": {
        "name": "Maria Lyubimtseva",
        "email": "marialyu@google.com",
        "time": "Thu Oct 01 22:05:22 2026"
      },
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        "time": "Thu Oct 01 22:08:01 2026"
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        "email": "terryheo@google.com",
        "time": "Thu Oct 01 21:47:26 2026"
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        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 21:49:13 2026"
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      "message": "Add a LiteRT cpu_backend build flag and a minimal build guide\n\nUsers had to pass --define\u003dtflite_with_xnnpack\u003dfalse to build LiteRT without\nXNNPACK, which was a TFLite-specific knob.\n\n- Added --//litert/build_common:cpu_backend\u003d{xnnpack,builtin}.\n- Made litert_disable_cpu match either the new flag or the legacy define.\n- Added test/minimal_compiled_model, a minimal CompiledModel program for\n  measuring the size of a minimal CPU runtime, with a test that runs it on\n  transformer.tflite.\n- Added MINIMAL_BUILD.md describing how to build a small CPU-only runtime\n  and the measured binary sizes of each option.\n\nLiteRT-PiperOrigin-RevId: 991916283\n"
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        "time": "Thu Oct 01 21:19:50 2026"
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        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 21:22:31 2026"
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      "message": "Implement WebGPU shape/indexing, spatial conv/pool, and LSTM operations and enable GPU NumericalTestSuite.\n\nLiteRT-PiperOrigin-RevId: 991900283\n"
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        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 20:52:00 2026"
      },
      "message": "Merge pull request #10270 from gunes-arm:pr/naming-changes\n\nLiteRT-PiperOrigin-RevId: 991881128\n"
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        "name": "Gerardo Carranza",
        "email": "gcarranza@google.com",
        "time": "Thu Oct 01 19:48:24 2026"
      },
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        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 19:50:15 2026"
      },
      "message": "Expose delegation metrics through LiteRT C and C++ compiled model APIs.\n\nLiteRT-PiperOrigin-RevId: 991845463\n"
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        "email": "terryheo@google.com",
        "time": "Thu Oct 01 18:51:05 2026"
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        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 19:02:38 2026"
      },
      "message": "Remove obsolete highwayhash patching from Windows wheel build script\n\n- Removed the highwayhash MSVC alignment patch block from\n  build_pip_package_with_bazel_windows.ps1 as highwayhash is no longer fetched\n  after removing TensorFlow dependencies.\n\nLiteRT-PiperOrigin-RevId: 991812034\n"
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        "email": "fengwuyao@google.com",
        "time": "Thu Oct 01 18:52:42 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 18:57:27 2026"
      },
      "message": "Fix -Wpass-failed build break in the XNNPACK MoE kernel under sanitizers.\n\nPiperOrigin-RevId: 991813170\n"
    },
    {
      "commit": "eb610eeb0e25ddee7d7cb4404a313a226891221f",
      "tree": "778a2460455295d1069f2e0c8899d6bc0b45a276",
      "parents": [
        "e52511b61fdab4792ef56f551244ba1c50adcdfd"
      ],
      "author": {
        "name": "Google AI Edge",
        "email": "ai-edge-bot@google.com",
        "time": "Thu Oct 01 18:50:34 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 18:53:09 2026"
      },
      "message": "Use hardware simd_sum and single-phase shared-memory reduction in gated_delta_update shader.\n\n- Replace the 5-iteration `simd_shuffle_xor` butterfly loop in `kGatedDeltaUpdateShuffleShader` with 1-cycle hardware `simd_sum` when `q_slices \u003d\u003d 32` (`D_k \u003d\u003d 128`).\n- Optimize the fallback shared-memory shader (`kGatedDeltaUpdateSharedMemShader`) from a two-phase tree reduction (10 barriers per token step) to a single-phase 2-barrier reduction via `sq_mem + delta_slice * kq_dot`.\n\n### Benchmarks (Apple M-series Metal GPU, Qwen3.8-27B: B\u003d1, H_k\u003d16, H_v\u003d32, D_k\u003d128, D_v\u003d128, 48 layers)\n\n1. **Standalone Op-Level Benchmark (`gated_delta_update_gpu_benchmark`)**:\n   - `L\u003d1` (decode): Min `358 µs` / P50 `388 µs` (48L P50: `18.62 ms`) vs Baseline `392 µs` P50 (`18.82 ms`)\n   - `L\u003d128` (prefill): Min `419 µs` / P50 `453 µs` (48L P50: `21.74 ms`) vs Baseline `657 µs` Min / `723 µs` P50 (`34.70 ms`) — **1.60x faster**\n   - `L\u003d256` (prefill): Min `720 µs` / P50 `760 µs` (48L P50: `36.48 ms`) vs Baseline `745 µs` Min / `875 µs` P50 (`42.00 ms`) — **1.15x faster**\n   - `L\u003d512` (prefill): Min `1,260 µs` / P50 `1,292 µs` (48L P50: `62.02 ms`)\n   - `L\u003d1024` (prefill): Min `2,387 µs` / P50 `2,489 µs` (48L P50: `119.47 ms`)\n\n2. **In-Model 48-Layer GPU Kernel Profile (`--enable_profiling\u003dtrue --disable_gpu_program_cache\u003dtrue`)**:\n   - `Delegate/gated_delta_update` (48 layers, `L\u003d128` prefill): **`14.024 ms` total (`292.2 µs/layer`, min `283.0 µs`)** vs Baseline **`30.872 ms` (`643.2 µs/layer`)** — **2.20x faster**\n   - `Delegate/gated_delta_update` (48 layers, decode): **`0.775 ms/token` (`16.1 µs/layer`)** vs Baseline **`0.941 ms/token` (`19.6 µs/layer`)** — **1.21x faster**\n\n3. **Qwen3.8-27B Warm End-to-End (`--num_iterations\u003d3 --disable_gpu_program_cache\u003dtrue`, `L\u003d128` prefill, `32` decode)**:\n   - Warm Prefill: **`436.61 ms` (`293.17 tokens/sec`)** vs Baseline `438.34 ms` (`292.01 tokens/sec`)\n   - Warm Decode: **`11.32 tokens/sec`**\n\nUse hardware simd_sum and single-phase shared-memory reduction in gated_delta_update shader.\n\nLiteRT-PiperOrigin-RevId: 991811713\n"
    },
    {
      "commit": "e52511b61fdab4792ef56f551244ba1c50adcdfd",
      "tree": "83dfd9b7dfaa39f27e3491fb5abf930ea16c8ff7",
      "parents": [
        "5b39c033efdac0d7f58b5e7f43e369cb6b706fab"
      ],
      "author": {
        "name": "Matt Kreileder CA",
        "email": "mattalexander@google.com",
        "time": "Thu Oct 01 18:45:35 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 18:48:06 2026"
      },
      "message": "Make the OpenVINO android_x86_64 TAP project actually compile src_gen.\n\nLiteRT-PiperOrigin-RevId: 991809018\n"
    },
    {
      "commit": "5b39c033efdac0d7f58b5e7f43e369cb6b706fab",
      "tree": "5779f53fa926b5b05b27e5a41210654f6124e974",
      "parents": [
        "d703c55c9fdec082bb19e982bf67ead9f992c213"
      ],
      "author": {
        "name": "Jiun Kai Yang",
        "email": "kelvin777320@gmail.com",
        "time": "Thu Oct 01 18:28:57 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 18:31:03 2026"
      },
      "message": "PR #9968: Qualcomm AI Engine Direct - Switch from coarse-grained to fine-grained ops.\n\nImported from GitHub PR https://github.com/google-ai-edge/LiteRT/pull/9968\n\nSummary:\n- Replace generic ElementWiseUnary/Binary/Neuron ops with dedicated elementwise ops to enable more HTP optimizations.\n- Add unit tests for each elementwise op builder.\n\nx86 test:\n```\n\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d Test Summary \u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\n//litert/c/options:litert_qualcomm_options_test\n//litert/c/options:litert_qualcomm_options_test                 (cached) PASSED in 0.0s\n\n//litert/tools/flags/vendors:qualcomm_flags_test\n//litert/tools/flags/vendors:qualcomm_flags_test                (cached) PASSED in 0.3s\n\n//litert/vendors/qualcomm/core/utils:utils_test\n//litert/vendors/qualcomm/core/utils:utils_test                 (cached) PASSED in 0.1s\n\n//litert/vendors/qualcomm/core/wrappers/tests:op_wrapper_test\n//litert/vendors/qualcomm/core/wrappers/tests:op_wrapper_test   (cached) PASSED in 0.2s\n\n//litert/vendors/qualcomm/core/wrappers/tests:tensor_wrapper_test\n//litert/vendors/qualcomm/core/wrappers/tests:tensor_wrapper_test (cached) PASSED in 0.0s\n\n//litert/vendors/qualcomm/core/wrappers/tests:param_wrapper_test\n//litert/vendors/qualcomm/core/wrappers/tests:param_wrapper_test (cached) PASSED in 0.0s\n\n//litert/vendors/qualcomm/core/wrappers/tests:quantize_params_wrapper_test\n//litert/vendors/qualcomm/core/wrappers/tests:quantize_params_wrapper_test (cached) PASSED in 0.0s\n\n//litert/vendors/qualcomm/core:common_test\n//litert/vendors/qualcomm/core:common_test                      (cached) PASSED in 0.0s\n\n//litert/vendors/qualcomm/core:tensor_pool_test\n//litert/vendors/qualcomm/core:tensor_pool_test                 (cached) PASSED in 0.0s\n\n//litert/vendors/qualcomm/core/transformation:all\n//litert/vendors/qualcomm/core/transformation:embedding_gemma_test (cached) PASSED in 0.0s\n//litert/vendors/qualcomm/core/transformation:graph_to_graph_test (cached) PASSED in 0.1s\n//litert/vendors/qualcomm/core/transformation:kv_swapped_attn_test (cached) PASSED in 0.0s\n\n//litert/vendors/qualcomm/qnn_backend_test:qnn_model_test\n//litert/vendors/qualcomm/qnn_backend_test:qnn_model_test       (cached) PASSED in 0.4s\n\n//litert/vendors/qualcomm/qnn_backend_test/builder_test:relu_test\n//litert/vendors/qualcomm/qnn_backend_test/builder_test:relu_test (cached) PASSED in 0.2s\n\n//litert/vendors/qualcomm/qnn_backend_test/builder_test:spatial_transform_nd_test\n//litert/vendors/qualcomm/qnn_backend_test/builder_test:spatial_transform_nd_test (cached) PASSED in 0.3s\n\n//litert/vendors/qualcomm/qnn_backend_test/builder_test:topk_test\n//litert/vendors/qualcomm/qnn_backend_test/builder_test:topk_test (cached) PASSED in 0.2s\n\n//litert/vendors/qualcomm/qnn_backend_test/builder_test:elementwise_test\n//litert/vendors/qualcomm/qnn_backend_test/builder_test:elementwise_test (cached) PASSED in 4.0s\n\n//litert/vendors/qualcomm/qnn_backend_test/builder_test:fully_connected_int2_test\n//litert/vendors/qualcomm/qnn_backend_test/builder_test:fully_connected_int2_test (cached) PASSED in 0.5s\n\n//litert/vendors/qualcomm/qnn_backend_test/builder_test:depthwise_conv2d_test\n//litert/vendors/qualcomm/qnn_backend_test/builder_test:depthwise_conv2d_test (cached) PASSED in 0.3s\n\n//litert/vendors/qualcomm/qnn_backend_test/builder_test:pack_test\n//litert/vendors/qualcomm/qnn_backend_test/builder_test:pack_test (cached) PASSED in 0.3s\n\n//litert/vendors/qualcomm/qnn_backend_test/builder_test:splitv_test\n//litert/vendors/qualcomm/qnn_backend_test/builder_test:splitv_test (cached) PASSED in 0.5s\n\n//litert/vendors/qualcomm/core/dump:dump_graph_test\n//litert/vendors/qualcomm/core/dump:dump_graph_test             (cached) PASSED in 0.0s\n\n//litert/vendors/qualcomm:qnn_manager_test\n//litert/vendors/qualcomm:qnn_manager_test                      (cached) PASSED in 0.2s\n\n//litert/vendors/qualcomm/core/backends:backend_utils_test\n//litert/vendors/qualcomm/core/backends:backend_utils_test      (cached) PASSED in 0.6s\n\n//litert/vendors/qualcomm/core/backends:htp_backend_test\n//litert/vendors/qualcomm/core/backends:htp_backend_test        (cached) PASSED in 1.1s\n\n//litert/vendors/qualcomm/core/backends:ir_backend_test\n//litert/vendors/qualcomm/core/backends:ir_backend_test         (cached) PASSED in 0.0s\n\n//litert/tools:tensor_utils_test\n//litert/tools:tensor_utils_test                                (cached) PASSED in 0.2s\n\n//litert/vendors/qualcomm/core/schema:soc_table_test\n//litert/vendors/qualcomm/core/schema:soc_table_test            (cached) PASSED in 0.0s\n\n//litert/c:litert_op_options_test\n//litert/c:litert_op_options_test                               (cached) PASSED in 0.1s\n\n//litert/vendors/qualcomm/compiler:qnn_compiler_plugin_test\n//litert/vendors/qualcomm/compiler:qnn_compiler_plugin_test     (cached) PASSED in 74.8s\n```\n\ndevice test:\n```\n\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d Test Summary \u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\nSM8650: //litert/c/options:litert_qualcomm_options_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 27 tests from 2 test suites ran. (1 ms total)\n[  PASSED  ] 27 tests.\n\nSM8650: //litert/tools/flags/vendors:qualcomm_flags_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 24 tests from 15 test suites ran. (0 ms total)\n[  PASSED  ] 24 tests.\n\nSM8650: //litert/vendors/qualcomm/core/utils:utils_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 16 tests from 3 test suites ran. (6 ms total)\n[  PASSED  ] 16 tests.\n\nSM8650: //litert/vendors/qualcomm/core/wrappers/tests:op_wrapper_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 22 tests from 2 test suites ran. (0 ms total)\n[  PASSED  ] 22 tests.\n\nSM8650: //litert/vendors/qualcomm/core/wrappers/tests:tensor_wrapper_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 40 tests from 3 test suites ran. (1 ms total)\n[  PASSED  ] 40 tests.\n\nSM8650: //litert/vendors/qualcomm/core/wrappers/tests:param_wrapper_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 31 tests from 17 test suites ran. (1 ms total)\n[  PASSED  ] 31 tests.\n\nSM8650: //litert/vendors/qualcomm/core/wrappers/tests:quantize_params_wrapper_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 67 tests from 9 test suites ran. (1 ms total)\n[  PASSED  ] 67 tests.\n\nSM8650: //litert/vendors/qualcomm/core:common_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 31 tests from 2 test suites ran. (0 ms total)\n[  PASSED  ] 31 tests.\n\nSM8650: //litert/vendors/qualcomm/core:tensor_pool_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 19 tests from 2 test suites ran. (1 ms total)\n[  PASSED  ] 19 tests.\n\nSM8650: //litert/vendors/qualcomm/core/transformation:kv_swapped_attn_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 1 test from 1 test suite ran. (2 ms total)\n[  PASSED  ] 1 test.\n\nSM8650: //litert/vendors/qualcomm/core/transformation:embedding_gemma_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 1 test from 1 test suite ran. (1 ms total)\n[  PASSED  ] 1 test.\n\nSM8650: //litert/vendors/qualcomm/core/transformation:graph_to_graph_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 17 tests from 6 test suites ran. (15 ms total)\n[  PASSED  ] 17 tests.\n\nSM8650: //litert/vendors/qualcomm/qnn_backend_test:qnn_model_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 1 test from 1 test suite ran. (501 ms total)\n[  PASSED  ] 1 test.\n\nSM8650: //litert/vendors/qualcomm/qnn_backend_test/builder_test:relu_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 1 test from 1 test suite ran. (214 ms total)\n[  PASSED  ] 0 tests.\n\nSM8650: //litert/vendors/qualcomm/qnn_backend_test/builder_test:spatial_transform_nd_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 2 tests from 1 test suite ran. (731 ms total)\n[  PASSED  ] 2 tests.\n\nSM8650: //litert/vendors/qualcomm/qnn_backend_test/builder_test:topk_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 1 test from 1 test suite ran. (459 ms total)\n[  PASSED  ] 1 test.\n\nSM8650: //litert/vendors/qualcomm/qnn_backend_test/builder_test:elementwise_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 49 tests from 1 test suite ran. (15601 ms total)\n[  PASSED  ] 49 tests.\n\nSM8650: //litert/vendors/qualcomm/qnn_backend_test/builder_test:fully_connected_int2_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 5 tests from 1 test suite ran. (1631 ms total)\n[  PASSED  ] 5 tests.\n\nSM8650: //litert/vendors/qualcomm/qnn_backend_test/builder_test:depthwise_conv2d_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 2 tests from 1 test suite ran. (779 ms total)\n[  PASSED  ] 2 tests.\n\nSM8650: //litert/vendors/qualcomm/qnn_backend_test/builder_test:pack_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 3 tests from 1 test suite ran. (966 ms total)\n[  PASSED  ] 3 tests.\n\nSM8650: //litert/vendors/qualcomm/qnn_backend_test/builder_test:splitv_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 5 tests from 1 test suite ran. (1612 ms total)\n[  PASSED  ] 5 tests.\n\nSM8650: //litert/vendors/qualcomm/core/dump:dump_graph_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 5 tests from 1 test suite ran. (2 ms total)\n[  PASSED  ] 5 tests.\n\nSM8650: //litert/vendors/qualcomm:qnn_manager_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 9 tests from 2 test suites ran. (11 ms total)\n[  PASSED  ] 9 tests.\n\nSM8650: //litert/vendors/qualcomm/core/backends:backend_utils_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 5 tests from 2 test suites ran. (619 ms total)\n[  PASSED  ] 5 tests.\n\nSM8650: //litert/vendors/qualcomm/core/backends:htp_backend_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 27 tests from 7 test suites ran. (5413 ms total)\n[  PASSED  ] 27 tests.\n\nSM8650: //litert/vendors/qualcomm/core/backends:ir_backend_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 3 tests from 2 test suites ran. (8 ms total)\n[  PASSED  ] 3 tests.\n\nSM8650: //litert/tools:tensor_utils_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 23 tests from 1 test suite ran. (78 ms total)\n[  PASSED  ] 23 tests.\n\nSM8650: //litert/vendors/qualcomm/core/schema:soc_table_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 2 tests from 1 test suite ran. (0 ms total)\n[  PASSED  ] 2 tests.\n\nSM8650: //litert/vendors/qualcomm/core/backends:dsp_backend_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 29 tests from 3 test suites ran. (18 ms total)\n[  PASSED  ] 0 tests.\n\nSM8650: //litert/vendors/qualcomm/core/backends:gpu_backend_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 2 tests from 1 test suite ran. (1 ms total)\n[  PASSED  ] 0 tests.\n\nSM8650: //litert/vendors/qualcomm/core/backends:backend_factory_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 5 tests from 1 test suite ran. (830 ms total)\n[  PASSED  ] 3 tests.\n\nSM8650: //litert/vendors/qualcomm/dispatch:_dispatch_api_qualcomm_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 5 tests from 1 test suite ran. (443 ms total)\n[  PASSED  ] 5 tests.\n\nSM8650: //litert/cc:_litert_compiled_model_qualcomm_test\n[\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d] 2 tests from 1 test suite ran. (461 ms total)\n[  PASSED  ] 2 tests.\n```\nCopybara import of the project:\n\n--\n1edb2ca2f533a68df662f8ae576438df5b4d3494 by jiunkaiy \u003cjiunkaiy@qti.qualcomm.com\u003e:\n\nQualcomm AI Engine Direct - Switch from coarse-grained to fine-grained ops.\n\nSummary:\n- Replace generic ElementWiseUnary/Binary/Neuron ops with dedicated elementwise ops to enable more HTP optimizations.\n- Add unit tests for each elementwise op builder.\n\nMerging this change closes #9968\n\nCOPYBARA_INTEGRATE_REVIEW\u003dhttps://github.com/google-ai-edge/LiteRT/pull/9968 from graham0824:dev/jiunkaiy/coarse_fine_grained 1edb2ca2f533a68df662f8ae576438df5b4d3494\nLiteRT-PiperOrigin-RevId: 991798517\n"
    },
    {
      "commit": "d703c55c9fdec082bb19e982bf67ead9f992c213",
      "tree": "cdf91e70d161d1e1884c183a23ffaeb4db8f5844",
      "parents": [
        "261401ca2833b98504e9dd6f3955df4a85367e55"
      ],
      "author": {
        "name": "Volodymyr Kysenko",
        "email": "vksnk@google.com",
        "time": "Thu Oct 01 18:21:06 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 18:25:29 2026"
      },
      "message": "Simplify GQA graph construction in YNNPACK and tighten SDPA decode1 threshold.\n\n- Skip 5D mask expansion and logits split/fuse in `gqa_fold` when the mask\u0027s query sequence dimension is 1.\n- Deduplicate `g_heads_per_kv \u003e 1` input/output reshape logic and remove dead `is_seq_major` GQA branches.\n- Lower the `use_decode1` threshold from `q_seq * g \u003c\u003d 32` to `q_seq * g \u003c\u003d 8`.\n\nPiperOrigin-RevId: 991794080\n"
    },
    {
      "commit": "261401ca2833b98504e9dd6f3955df4a85367e55",
      "tree": "a4044463b6d2af69f50031e7bde0c666f8f73abb",
      "parents": [
        "2db38fd18b0b2d7b7c6ab98b5ccc14f293583c60"
      ],
      "author": {
        "name": "Jun Jiang",
        "email": "junjiang@google.com",
        "time": "Thu Oct 01 18:20:05 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 18:21:47 2026"
      },
      "message": "Add a migration guide from TFLite Support to LiteRT Support.\n\nLiteRT-PiperOrigin-RevId: 991793503\n"
    },
    {
      "commit": "2db38fd18b0b2d7b7c6ab98b5ccc14f293583c60",
      "tree": "0a0bc79c6852c2242ef32748c91c629dbfb00429",
      "parents": [
        "9de33b5baaa03e5c2702a17cf1c5cdead3613ebf"
      ],
      "author": {
        "name": "Fengwu Yao",
        "email": "fengwuyao@google.com",
        "time": "Thu Oct 01 16:54:09 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 16:55:21 2026"
      },
      "message": "Optimize XNNPACK MoE expert weight dequantization, single-token GEMV, and scratch memory.\n\nPiperOrigin-RevId: 991740402\n"
    },
    {
      "commit": "9de33b5baaa03e5c2702a17cf1c5cdead3613ebf",
      "tree": "e8ee73a3a3604df958ce2dbd08a49e47ecb802aa",
      "parents": [
        "2f17ea5a415bfa8fa8ea85d95e5530cf0e318059"
      ],
      "author": {
        "name": "Terry Heo",
        "email": "terryheo@google.com",
        "time": "Thu Oct 01 16:37:34 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 16:38:43 2026"
      },
      "message": "Avoid linking XNNPACK in BuiltinOpResolverWithoutDefaultDelegates\n\nBuiltinOpResolverWithoutDefaultDelegates called the BuiltinOpResolver\nconstructor, which referenced the default XNNPACK delegate creator, and then\ncleared it. The linker could not dead-strip XNNPACK for users that never\nwanted default delegates.\n\n- Moved builtin op registration into a private RegisterBuiltinOps().\n- Added a protected tag constructor that registers ops only.\n- Made BuiltinOpResolverWithoutDefaultDelegates use the tag constructor.\n\nPiperOrigin-RevId: 991731359\n"
    },
    {
      "commit": "2f17ea5a415bfa8fa8ea85d95e5530cf0e318059",
      "tree": "14e906a0172a2a37200ea9af86cb9f151b622554",
      "parents": [
        "ecdc41c2505aa60a6546a242eb4ada86a07a0b06"
      ],
      "author": {
        "name": "Gerardo Carranza",
        "email": "gcarranza@google.com",
        "time": "Thu Oct 01 16:11:48 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 16:14:18 2026"
      },
      "message": "Add YNNPACK CPU backend support to LiteRT ATS.\n\nLiteRT-PiperOrigin-RevId: 991717155\n"
    },
    {
      "commit": "ecdc41c2505aa60a6546a242eb4ada86a07a0b06",
      "tree": "c4b5023d4eadc6fce9ae647892c4cd563a3f8aca",
      "parents": [
        "724a247cc57d8601ba66405080b1f1e5f70a6d3f"
      ],
      "author": {
        "name": "Tommy Chiang",
        "email": "ototot@google.com",
        "time": "Thu Oct 01 16:07:29 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 16:10:04 2026"
      },
      "message": "Legalize REDUCE_ANY in the OpenVINO compiler plugin.\n\nAdd `kLiteRtOpCodeTflReduceAny` to the plugin\u0027s supported ops, next to the\nalready supported `REDUCE_ALL`, so that graphs using it are no longer split\nout of the NPU partition.\n\nLiteRT-PiperOrigin-RevId: 991714812\n"
    },
    {
      "commit": "724a247cc57d8601ba66405080b1f1e5f70a6d3f",
      "tree": "8b94273e92f66ae423ec3a93d03abbc74c74a193",
      "parents": [
        "213461045ea5fb46cc7b559448879dccba9673c8"
      ],
      "author": {
        "name": "Gerardo Carranza",
        "email": "gcarranza@google.com",
        "time": "Thu Oct 01 15:47:15 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 15:49:01 2026"
      },
      "message": "Decouple YNNPACK CPU accelerator registration from compile-time preprocessor macros.\n\nLiteRT-PiperOrigin-RevId: 991703839\n"
    },
    {
      "commit": "213461045ea5fb46cc7b559448879dccba9673c8",
      "tree": "355f3dc37ababb7f8d4eaf11e45199d49efaf421",
      "parents": [
        "06705e93ce910abdbf3013cd9a42e222485b5200"
      ],
      "author": {
        "name": "Catalin Termure",
        "email": "catalintermure@google.com",
        "time": "Thu Oct 01 15:14:41 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 15:16:37 2026"
      },
      "message": "Add filegroup target for LiteRT C++ SDK sources\n\nEach package that owns files of the LiteRT C++ SDK now has a\n\"litert_cc_sdk_files\" filegroup. The new \"//litert/cc_sdk:litert_cc_sdk_files\"\nfilegroup collects all of them.\n\nAdds a missing headers in litert_cc_sdk_hdrs.txt:\n* litert/c/litert_builder.h, litert_tfl_types.h included by litert/cc/internal/litert_op_options.h\n* litert_shared_library_windows.h included on Windows\n\nAdds tests to check that these file sets build and that the filegroup targets are the same as the .txt files. For the latter I had to sort the .txt files for deterministic ordering.\n\nAlso adds a missing compile target in the CMakeLists.txt (absl::flat_hash_map) required by litert_api_types.h.\n\nLiteRT-PiperOrigin-RevId: 991686372\n"
    },
    {
      "commit": "06705e93ce910abdbf3013cd9a42e222485b5200",
      "tree": "8f426036a483e3d9bc52652b4934a14dfd61d83a",
      "parents": [
        "541ebbbc73ee17c206675dc455b9a4fe3710e951"
      ],
      "author": {
        "name": "Google AI Edge",
        "email": "ai-edge-bot@google.com",
        "time": "Thu Oct 01 14:22:02 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 14:26:21 2026"
      },
      "message": "Add mixed-precision and FP32 recurrent state support to LiteRT GPU delegate and custom ops.\n\nLiteRT-PiperOrigin-RevId: 991661471\n"
    },
    {
      "commit": "541ebbbc73ee17c206675dc455b9a4fe3710e951",
      "tree": "0135e98d63ab4632fdd7f85aacc7bb0546f4291e",
      "parents": [
        "471a9fdeae4a61e233dce46e06163951b968c6be"
      ],
      "author": {
        "name": "Raman Sarokin",
        "email": "sorokin@google.com",
        "time": "Thu Oct 01 13:53:10 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 13:54:49 2026"
      },
      "message": "Move MakeConvWithBatchIds to common MoE utils and reuse it in LiteRT composite kernel.\n\nLiteRT-PiperOrigin-RevId: 991648651\n"
    },
    {
      "commit": "471a9fdeae4a61e233dce46e06163951b968c6be",
      "tree": "013ff2fd383083d04b6a5452631869992bf6cb01",
      "parents": [
        "cde1321609460b06bc0b339ff89b42ab6296b47c"
      ],
      "author": {
        "name": "Jun Jiang",
        "email": "junjiang@google.com",
        "time": "Thu Oct 01 06:44:27 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 06:46:10 2026"
      },
      "message": "Update README.md for LiteRT Swift user guide.\n\n- In `gpu_registry.cc`, the macOS Metal list now also tries \"LiteRtMetalAccelerator\", the binary name inside the framework, right after libLiteRtMetalAccelerator.dylib.\n- Clean up Package.swift by removing redundant exclusions and unsafe linker flags.\n- Reorganize LiteRT Swift C module files.\n\nLiteRT-PiperOrigin-RevId: 991462247\n"
    },
    {
      "commit": "cde1321609460b06bc0b339ff89b42ab6296b47c",
      "tree": "cd86e51e66c0c7abde9e55707ad8a8bdd23ade48",
      "parents": [
        "dcfd9b7ad828571e5bcd41cc768c336c27113d47"
      ],
      "author": {
        "name": "Fengwu Yao",
        "email": "fengwuyao@google.com",
        "time": "Thu Oct 01 02:59:35 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 03:02:15 2026"
      },
      "message": "Enable BOOL mask pruning for all Flash-Decode head dims in sdpa_transposed.\n\nLiteRT-PiperOrigin-RevId: 991383815\n"
    },
    {
      "commit": "dcfd9b7ad828571e5bcd41cc768c336c27113d47",
      "tree": "ed3896bccc7e9c68cdbad8a5e5bc044ede031747",
      "parents": [
        "eed62af8f79a63c78623e9083626a97e6a8e2ea3"
      ],
      "author": {
        "name": "Fengwu Yao",
        "email": "fengwuyao@google.com",
        "time": "Thu Oct 01 02:36:25 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 02:38:01 2026"
      },
      "message": "Do not clamp Flash-Decode active tokens to param[0] for single-query causal SDPA.\n\nLiteRT-PiperOrigin-RevId: 991375609\n"
    },
    {
      "commit": "0d4a8cb246525d50a610314687e48c13a661bfa3",
      "tree": "482954a4644210095ee9eaa0d4ba024233c06b84",
      "parents": [
        "165f86d548053680c67206eb6c5e394d7e3a5a2a"
      ],
      "author": {
        "name": "hungjuiw",
        "email": "hungjuiw@qti.qualcomm.com",
        "time": "Thu Oct 01 02:06:06 2026"
      },
      "committer": {
        "name": "hungjuiw",
        "email": "hungjuiw@qti.qualcomm.com",
        "time": "Thu Oct 01 02:06:06 2026"
      },
      "message": "Qualcomm AI Engine Direct - Fix addn_test.cc issue due to namespace\n\nSummary:\n- Fix addn_test.cc build issue due to GTest on Pointwise and FloatNear\n"
    },
    {
      "commit": "eed62af8f79a63c78623e9083626a97e6a8e2ea3",
      "tree": "94d589d50d9e714128277a1c78766d535a031857",
      "parents": [
        "b5de9a0424ae5e88b93e310165c70b6bf3d4dd5c"
      ],
      "author": {
        "name": "Fengwu Yao",
        "email": "fengwuyao@google.com",
        "time": "Thu Oct 01 01:51:05 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 01:52:57 2026"
      },
      "message": "Support the tanh-approximated GELU activation (GeGLU) in the odml.swiglu GPU kernel.\n\nLiteRT-PiperOrigin-RevId: 991358160\n"
    },
    {
      "commit": "b5de9a0424ae5e88b93e310165c70b6bf3d4dd5c",
      "tree": "5940f0838c2215362b5e55981b5876884eb85e18",
      "parents": [
        "6c6af0163c346459fe6f3024b0bb5c3a02f4a834"
      ],
      "author": {
        "name": "Fengwu Yao",
        "email": "fengwuyao@google.com",
        "time": "Thu Oct 01 01:30:02 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 01:31:49 2026"
      },
      "message": "Support V RMSNorm, Q-only mode, partial RoPE proportion, and head_dim up to 512 in qkv_norm_rope.\n\nLiteRT-PiperOrigin-RevId: 991348545\n"
    },
    {
      "commit": "6c6af0163c346459fe6f3024b0bb5c3a02f4a834",
      "tree": "f4d3e8d51b6e67ed3f7fbac6903cc06b7256ab44",
      "parents": [
        "7116bc9d82e80f0df01ac67034b8f6a4819c4b47"
      ],
      "author": {
        "name": "Terry Heo",
        "email": "terryheo@google.com",
        "time": "Thu Oct 01 01:05:30 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 01:07:23 2026"
      },
      "message": "Remove the unused BUILD_CONVERTER option from the LiteRT wheel build\n\nBUILD_CONVERTER built the converter into the ai_edge_litert wheel. It was a\nworkaround for the wheel size limit and is no longer used: the converter\nhas its own wheel, built by build_converter_with_bazel.sh.\n\n- Removed the build_converter flag and its selects from the wheel BUILD.\n- Removed BUILD_CONVERTER from build_pip_package_with_bazel.sh and\n  build_pip_package_with_docker.sh.\n- Removed the build_converter input from the linux nightly wheel workflow.\n\nLiteRT-PiperOrigin-RevId: 991337590\n"
    },
    {
      "commit": "7116bc9d82e80f0df01ac67034b8f6a4819c4b47",
      "tree": "5556b7669606c1bf81b448ecfc2dde8689cbfb50",
      "parents": [
        "b50f4bafadf59fee71b69f4b2104c0d79442ca38"
      ],
      "author": {
        "name": "Andrew Zhang",
        "email": "yunandrew@google.com",
        "time": "Thu Oct 01 01:01:08 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 01:02:55 2026"
      },
      "message": "Fix weight sharing, non-sharing compilation now produces separate context bin.\n\nLiteRT-PiperOrigin-RevId: 991335533\n"
    },
    {
      "commit": "b50f4bafadf59fee71b69f4b2104c0d79442ca38",
      "tree": "156e2135219fd2820e65cf5f2d18f14fdc93fa9c",
      "parents": [
        "ef7ea7485c2052ffd6843d7772c538c5adf7d989"
      ],
      "author": {
        "name": "Maria Lyubimtseva",
        "email": "marialyu@google.com",
        "time": "Thu Oct 01 00:45:44 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 00:48:38 2026"
      },
      "message": "Update copyright header for colabs\n\nLiteRT-PiperOrigin-RevId: 991328407\n"
    },
    {
      "commit": "ef7ea7485c2052ffd6843d7772c538c5adf7d989",
      "tree": "2435e268f0c6f26fef81f5db1093a8650d1ed7e5",
      "parents": [
        "79703217bbe9d087399022f7bf91a18560f411f3"
      ],
      "author": {
        "name": "Google AI Edge",
        "email": "ai-edge-bot@google.com",
        "time": "Wed Sep 30 23:50:16 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 00:04:44 2026"
      },
      "message": "Add the documentation and tests of nvidia\u0027s benchmark script\n\nrun_head.md describes the presets, metrics, cache layout and host\npreparation of run_head.sh; run_head_test.py covers its embedded collector\nand its command line (python3 -m unittest run_head_test, 32 tests).\n\nLiteRT-PiperOrigin-RevId: 991300222\n"
    },
    {
      "commit": "79703217bbe9d087399022f7bf91a18560f411f3",
      "tree": "4e04a4ac54af787b97f9ef0bab0b76413c9deef0",
      "parents": [
        "948486f1e16b64cfbf8e6ad095159138bc3e3e94"
      ],
      "author": {
        "name": "Google AI Edge",
        "email": "ai-edge-bot@google.com",
        "time": "Wed Sep 30 23:49:42 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 00:03:02 2026"
      },
      "message": "The NVIDIA dispatch library copied a CUDA tensor buffer to the device every\ntime the host unlocked it after a write. LiteRT-LM locks its attention\nmasks twice before every prefill, to clear and to fill them, which\nuploaded 127 MiB twice per call at a capacity of 130048 tokens.\n\nAn unlock now only marks the host copy as newer. The invocation that reads\nthe buffer uploads it in stream order, a read lock returns the host copy\nwhile it is the newer one, and an invocation that writes the buffer or a\nclear discards what the host wrote.\n\nLiteRT-PiperOrigin-RevId: 991299916\n"
    },
    {
      "commit": "948486f1e16b64cfbf8e6ad095159138bc3e3e94",
      "tree": "5a93d41571679a9fed93d18920a5dd578cf46a9c",
      "parents": [
        "9a1d7f224a4e2a1ca2708818ac3ec757bef12a60"
      ],
      "author": {
        "name": "Google AI Edge",
        "email": "ai-edge-bot@google.com",
        "time": "Wed Sep 30 23:48:40 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Thu Oct 01 00:01:17 2026"
      },
      "message": "Overlap the softmax and the score products of the tiled attention kernel\n\nA block now takes two phases per tile instead of three: the softmax of a\ntile runs in the phase that multiplies the queries by the keys of the next\ntile, the two warps of a tensor unit in opposite orders, so that the unit\nmultiplies for one warp while the other computes the softmax. The scores\nof the next tile wait in registers until the softmax is done with shared\nmemory.\n\nLiteRT-PiperOrigin-RevId: 991299302\n"
    },
    {
      "commit": "9a1d7f224a4e2a1ca2708818ac3ec757bef12a60",
      "tree": "7e5500d47b1fb05b159a9bd8da7803b9ab355eb7",
      "parents": [
        "4122e7f3a919dac1a70bdf6e1a395f9852ba1868"
      ],
      "author": {
        "name": "Google AI Edge",
        "email": "ai-edge-bot@google.com",
        "time": "Wed Sep 30 23:48:05 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 23:59:35 2026"
      },
      "message": "Run Gemma 4 prefill fully connected layers on the tensor-core GEMM\n\nwith the cuda subbyte gemv, the nvidia compiler plugin now lowers the int4\nfully connected layers of the prefill graphs to the tensor-core GEMM\n(trtllm/subbyte_gemm.h) in the same plugin, which takes a `tiled` field\nfor the weight order the GEMM reads:\n\n* The gate and up projections of a feed-forward block (fully connected,\n  reshape, GELU, multiply) become one launch that also applies the gate.\n* Projections that read the same activation (q, k and v) share one launch,\n  like they do in decode.\n* A product runs on the GEMM when it has at least three blocks per two\n  multiprocessors of the device; smaller ones, which would leave part of\n  the device idle, keep the TensorRT lowering.\n\nLiteRT-PiperOrigin-RevId: 991298972\n"
    },
    {
      "commit": "4122e7f3a919dac1a70bdf6e1a395f9852ba1868",
      "tree": "ca144e2d0ee90dec8d0ec3fee689ca3ee98e9c20",
      "parents": [
        "71684baea54ed5b665495d49504514277ecb80c3"
      ],
      "author": {
        "name": "Google AI Edge",
        "email": "ai-edge-bot@google.com",
        "time": "Wed Sep 30 23:47:29 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 23:57:38 2026"
      },
      "message": "Add a tensor-core GEMM for BF16 activations and INT4 weights\n\ntrtllm/subbyte_gemm.h multiplies many BF16 activation rows (prefill) by\nsigned INT4 weights with per-channel scales on m16n8k16 tensor-core\noperations. A first launch scales every activation row by a power of two\ninto [-1, 1] and converts it to FP16. The products then accumulate in FP16\nover 128 input dims at a time, which cannot overflow and runs at twice the\ntensor-core throughput of FP32 accumulation, and in FP32 beyond; the error\nthis adds stays below the rounding of a BF16 result.\n\nLiteRT-PiperOrigin-RevId: 991298612\n"
    },
    {
      "commit": "71684baea54ed5b665495d49504514277ecb80c3",
      "tree": "2df0c841cbba2f841c20615005a3726700460944",
      "parents": [
        "cffedb58bd0a1056ccc142458ddfce866810732d"
      ],
      "author": {
        "name": "Google AI Edge",
        "email": "ai-edge-bot@google.com",
        "time": "Wed Sep 30 23:47:00 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 23:54:21 2026"
      },
      "message": "Accumulate the scores of BF16 queries in FP16 on the tiled attention kernel\n\nBF16 queries carry a relative rounding error of 2^-9 into every attention\nscore, more than FP16 accumulation over 128 dims adds. Their scores now\naccumulate in FP16, at twice the tensor-core throughput of FP32\naccumulation, in chains of eight k-slices that are added up in FP32. The\nscores of FP16 queries still accumulate in FP32.\n\nThe running value sums of a row group are only rescaled for the tiles in\nwhich the maximum of one of its rows grew.\n\nGemma 4 12B global layer on an RTX 5080, 16384 BF16 query rows against\n129024 keys: 46.9 -\u003e 43.9 ms per launch.\n\nLiteRT-PiperOrigin-RevId: 991298301\n"
    },
    {
      "commit": "cffedb58bd0a1056ccc142458ddfce866810732d",
      "tree": "ba70ec2bdc6b5d6ea337070cf83636b4601e4604",
      "parents": [
        "d6ae6a495098935686af8a078d43787b86564733"
      ],
      "author": {
        "name": "Google AI Edge",
        "email": "ai-edge-bot@google.com",
        "time": "Wed Sep 30 23:46:27 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 23:52:17 2026"
      },
      "message": "Run Gemma 4 prefill attention on a tiled tensor-core kernel\n\nPrefill attention now runs on one kernel family (trtllm/tiled_attention.h):\na block owns 32768 / depth query rows of one head (64 for the global\nlayers, 128 for the local ones), walks the keys in tiles of 16 and stages\nevery tile of K and V once in shared memory. Twice the rows per block of\nthe staged kernel it replaces halve the bytes read per FLOP. A bitmap of\nthe tiles some row of a block can see replaces the visible-prefix summary,\nso sliding windows over a ring cache skip about half of the keys. The\nscores accumulate in FP32; the value product of a tile is one FP16 sum per\noutput, combined in FP32 across tiles.\n\nLiteRT-PiperOrigin-RevId: 991297961\n"
    },
    {
      "commit": "d6ae6a495098935686af8a078d43787b86564733",
      "tree": "2aa96442609ad61f3b956875ab9a693d59305db4",
      "parents": [
        "519999c29dca6d95e8e03f2e6b280875f1f07db5"
      ],
      "author": {
        "name": "Google AI Edge",
        "email": "ai-edge-bot@google.com",
        "time": "Wed Sep 30 23:43:34 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 23:48:37 2026"
      },
      "message": "Fuse Gemma 4 global attention into tensor-core CUDA kernels\n\nThe NVIDIA compiler plugin now lowers single-head depth-512 attention\nblocks (Gemma 4 12B global layers) in both the decode and the prefill\ngraphs to CUDA kernels that use m16n8k16 tensor-core operations and an\nonline softmax:\n\nLiteRT-PiperOrigin-RevId: 991296315\n"
    },
    {
      "commit": "519999c29dca6d95e8e03f2e6b280875f1f07db5",
      "tree": "c2102bc1e62bb0512c509564895b6c0a4e468da8",
      "parents": [
        "7278fe8cff88b1e5c6742dab065eda27770047f9"
      ],
      "author": {
        "name": "Ping Yu",
        "email": "piyu@google.com",
        "time": "Wed Sep 30 23:28:08 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 23:30:34 2026"
      },
      "message": "Implement WebGPU binary, comparison, logical, and ternary (Select/SelectV2) operations for LiteRT Tensor API.\n\nIncludes elementwise binary, relational, logical, and conditional select WGSL compute kernels.\n\nLiteRT-PiperOrigin-RevId: 991287546\n"
    },
    {
      "commit": "7278fe8cff88b1e5c6742dab065eda27770047f9",
      "tree": "57b5a066d325c6a9153602f7f9a10eb150d1820d",
      "parents": [
        "d4086147067c2c9834257ce8c12cacd43515209a"
      ],
      "author": {
        "name": "Maria Lyubimtseva",
        "email": "marialyu@google.com",
        "time": "Wed Sep 30 21:03:12 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 21:06:00 2026"
      },
      "message": "Add LiteRT Quantizer (litert_quantizer) to the LiteRT repository.\n\nLiteRT-PiperOrigin-RevId: 991208031\n"
    },
    {
      "commit": "d4086147067c2c9834257ce8c12cacd43515209a",
      "tree": "813178c4bcec9dff56bf1ca5651cec6fd875af74",
      "parents": [
        "b460105aa91844b5f2192862be0aba4bf5841f91"
      ],
      "author": {
        "name": "Terry Heo",
        "email": "terryheo@google.com",
        "time": "Wed Sep 30 20:16:27 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 20:18:14 2026"
      },
      "message": "Remove org_tensorflow and tf_workspace dependencies from LiteRT OSS\n\nThe default build now uses the TensorFlow shim repositories and no longer\nfetches TensorFlow. LITERT_WITH_TENSORFLOW\u003d1 (`--config\u003dwith_tensorflow`)\nstill builds with the real TensorFlow for the converter and the tests that\nneed it.\n\n* Replaced the `org_tensorflow` repository declaration in `WORKSPACE` with\n  the shim repositories. `litert_tf_config` reads LITERT_WITH_TENSORFLOW,\n  and in TF mode `@org_tensorflow` was the real source instead.\n* Kept the `tf_workspace*()` calls, which were no-ops with the shim.\n* Removed `litert_prefixes` and `use_local_tf` configs from `bazelrc`.\n* Cleaned up `USE_LOCAL_TF` and `TF_LOCAL_SOURCE_PATH` from CI scripts\n  and GitHub Actions workflows.\n* Added the TensorFlow shim dependencies to `WORKSPACE`, with\n  bazel_skylib 1.9.0, local_config_python, system_python and the maven\n  repository that TensorFlow used to provide.\n* Added what `tf_workspace0/1()` used to set up: `local_config_android`\n  (copied `third_party/android` from TensorFlow), Swift and apple_support\n  dependencies (`local_config_apple_cc`).\n* Pinned re2 to the revision TensorFlow used. 2024-03-01 fails with clang.\n* Made the shim\u0027s `tf_proto_library` `_py` target expose the generated\n  `*_pb2.py` files, which the wheel build copies.\n* Updated rules_java to 8.7.0.\n* Excluded targets that need TensorFlow from GitHub Actions CI. Only\n  Internal CI \u0027cpu_full\u0027 on Linux tests them. macOS and Windows CI no\n  longer test them.\n* Fixed Copybara reversibility of rbe_platform.bzl and litert/kotlin/BUILD.\n\nLiteRT-PiperOrigin-RevId: 991179071\n"
    },
    {
      "commit": "b460105aa91844b5f2192862be0aba4bf5841f91",
      "tree": "f50f07de2ad6b6d683bc5a351c5ec55890bc2b31",
      "parents": [
        "2588243bdfdd7e1f5f3aabb09ac282dde06cc1da"
      ],
      "author": {
        "name": "Jun Jiang",
        "email": "junjiang@google.com",
        "time": "Wed Sep 30 19:15:58 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 19:18:36 2026"
      },
      "message": "Rewrite QuantizationTests.swift in XCTest and drop the swift-testing dep due to OSS rules_swift version mismatch.\n\nLiteRT-PiperOrigin-RevId: 991142531\n"
    },
    {
      "commit": "2588243bdfdd7e1f5f3aabb09ac282dde06cc1da",
      "tree": "6b761f8c1830482d84a672b660c56e5b54c61341",
      "parents": [
        "b263ebb3877a0d3720977a0ec21d08718ab18525"
      ],
      "author": {
        "name": "Tenghui Zhu",
        "email": "ztenghui@google.com",
        "time": "Wed Sep 30 19:02:00 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 19:06:15 2026"
      },
      "message": "Internal change\n\nLiteRT-PiperOrigin-RevId: 991133704\n"
    },
    {
      "commit": "b263ebb3877a0d3720977a0ec21d08718ab18525",
      "tree": "1077fe4a4f83cf81f41bb86f92ab4fd96d2c8078",
      "parents": [
        "769e75b65152132fd1205237e2a75dd7ecd5c743"
      ],
      "author": {
        "name": "Fengwu Yao",
        "email": "fengwuyao@google.com",
        "time": "Wed Sep 30 18:59:54 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 19:02:00 2026"
      },
      "message": "Require cl_arm_import_memory_android_hardware_buffer for AHWB \u003c-\u003e OpenCL interop.\n\nLiteRT-PiperOrigin-RevId: 991132486\n"
    },
    {
      "commit": "769e75b65152132fd1205237e2a75dd7ecd5c743",
      "tree": "678bd72308ccd6c5c0c44dd6d23e7891582a7773",
      "parents": [
        "3445317e463bee6a4b5ec73debc912de6240fb4d"
      ],
      "author": {
        "name": "Terry Heo",
        "email": "terryheo@google.com",
        "time": "Wed Sep 30 18:49:04 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 18:55:59 2026"
      },
      "message": "Add LITERT_WITH_TENSORFLOW to test TensorFlow targets in CI\n\nPrepares CI for the TensorFlow-free default build. With\n`LITERT_WITH_TENSORFLOW\u003d1`, `run_bazel_test.sh` tests the targets that need\nTensorFlow, including the converter, tflite/testing and `litert/compiler`.\n\n- Added `--config\u003dwith_tensorflow` and used it in `litert_converter`. It\n  sets `LITERT_WITH_TENSORFLOW\u003d1`, which picks the real TensorFlow once the\n  default build uses the shim.\n- Split the TF-only targets in `run_bazel_test.sh` into their own lists.\n  They were excluded unless LITERT_WITH_TENSORFLOW\u003d1. In that mode, the\n  `litert` targets that need TensorFlow were tested with `//tflite/...`.\n- Excluded Flex delegate targets, which are no longer supported.\n- Passed LITERT_WITH_TENSORFLOW to the test docker container.\n- Used `--config\u003dwith_tensorflow` for converter wheels\n  (BUILD_CONVERTER\u003dtrue).\n\nLiteRT-PiperOrigin-RevId: 991125971\n"
    },
    {
      "commit": "3445317e463bee6a4b5ec73debc912de6240fb4d",
      "tree": "5baea0aa02d5e2b88c9cdcf4c65f2229b42fa931",
      "parents": [
        "f60efba0d8d680d8608c0cfd573b6ac1c642715a"
      ],
      "author": {
        "name": "Andrew Zhang",
        "email": "yunandrew@google.com",
        "time": "Wed Sep 30 18:48:55 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 18:50:51 2026"
      },
      "message": "Add DMA-BUF and peak memory reporting to LiteRT tools and runner script for embedding models.\n\nLiteRT-PiperOrigin-RevId: 991125871\n"
    },
    {
      "commit": "f60efba0d8d680d8608c0cfd573b6ac1c642715a",
      "tree": "64114d0a4b065bbf213ec99f511328150fccf97b",
      "parents": [
        "c0575cf424115366f7a85be044ee036acb8c03de"
      ],
      "author": {
        "name": "Terry Heo",
        "email": "terryheo@google.com",
        "time": "Wed Sep 30 17:29:19 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 17:31:45 2026"
      },
      "message": "Prevent redundant TFLite ArenaPlanner allocations for subgraph I/O\n\nSubgraph input and output tensors in LiteRtCompiledModel never utilize the\nbuffers allocated by TFLite\u0027s ArenaPlanner, as they are either bound to\naccelerator buffers (WebGPU/OpenCL/Metal/NPU) or custom host allocations.\nPre-marking signature subgraph I/O tensors as kTfLiteNonCpu prevents\nunnecessary contiguous host heap allocations during model initialization.\n\nBenchmarked on aarch64 (WebGPU backend):\n- Reduced in-use heap size from 421.23 MB to 397.02 MB (-24.21 MB) with\n  1024 prefill tokens.\n- Reduced in-use heap size from 485.00 MB to 405.13 MB (-79.88 MB) with\n  4096 prefill tokens.\n- Accelerated executor initialization time from 8.23 s to 7.19 s (~13%).\n- Prevented large contiguous host memory allocations on long-context models.\n\nLiteRT-PiperOrigin-RevId: 991074420\n"
    },
    {
      "commit": "c0575cf424115366f7a85be044ee036acb8c03de",
      "tree": "9bdcf9f9b499630c77c6f4630d6bdadb2aacf3d0",
      "parents": [
        "91b2c64d996142d68f9fdb44777d1d6e2e679fb1"
      ],
      "author": {
        "name": "Gerardo Carranza",
        "email": "gcarranza@google.com",
        "time": "Wed Sep 30 17:10:18 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 17:12:15 2026"
      },
      "message": "Add INT4 FullyConnected test coverage to LiteRT ATS.\n\nLiteRT-PiperOrigin-RevId: 991062631\n"
    },
    {
      "commit": "91b2c64d996142d68f9fdb44777d1d6e2e679fb1",
      "tree": "7a2a3bb1b5bbe818eac3b9c3e27eccaff2dec0f0",
      "parents": [
        "b5857837a9b9c2b2389b735582a2a5e666894e5a"
      ],
      "author": {
        "name": "Ping Yu",
        "email": "piyu@google.com",
        "time": "Wed Sep 30 16:40:26 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 16:42:13 2026"
      },
      "message": "Implement WebGPU unary, activation, cast, and shape-aliasing operations for LiteRT Tensor API.\n\nLiteRT-PiperOrigin-RevId: 991044139\n"
    },
    {
      "commit": "b5857837a9b9c2b2389b735582a2a5e666894e5a",
      "tree": "72a8241374bf77ee0833ea75e340df81f06db30c",
      "parents": [
        "5ee5bda128a4bfc41f0518ecb67062e293ab278b"
      ],
      "author": {
        "name": "Quentin Khan",
        "email": "qkhan@google.com",
        "time": "Wed Sep 30 16:30:52 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 16:33:31 2026"
      },
      "message": "Extract functions that can be reused to run with YNNPACK.\n\nLiteRT-PiperOrigin-RevId: 991038988\n"
    },
    {
      "commit": "5ee5bda128a4bfc41f0518ecb67062e293ab278b",
      "tree": "c02046c93337693c7e679f90c4e0e7b11f48e01f",
      "parents": [
        "c4d5081e0d59a45bed50115e686463cecfbb5713"
      ],
      "author": {
        "name": "Google AI Edge",
        "email": "ai-edge-bot@google.com",
        "time": "Wed Sep 30 14:45:19 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 14:46:15 2026"
      },
      "message": "Automated Code Change\n\nPiperOrigin-RevId: 990983218\n"
    },
    {
      "commit": "c4d5081e0d59a45bed50115e686463cecfbb5713",
      "tree": "e4780adc641cab4136ce238d53e96e14e11164e0",
      "parents": [
        "0b67fbcac8f42a3e5b0a9d173455a715dd4a77c2"
      ],
      "author": {
        "name": "Quentin Khan",
        "email": "qkhan@google.com",
        "time": "Wed Sep 30 14:38:59 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 14:41:40 2026"
      },
      "message": "Remove source_location shim now that absl::SourceLocation is open source.\n\nLiteRT-PiperOrigin-RevId: 990980274\n"
    },
    {
      "commit": "0b67fbcac8f42a3e5b0a9d173455a715dd4a77c2",
      "tree": "1bb1be1f0b8a0e368423416edc13921d71ed2c1e",
      "parents": [
        "321b9699d9c7257a446017ebb574ae79bbce02ab"
      ],
      "author": {
        "name": "Google AI Edge",
        "email": "ai-edge-bot@google.com",
        "time": "Wed Sep 30 13:50:58 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 13:52:56 2026"
      },
      "message": "Add GQA head ratio (H_v vs H_k) support to CPU and GPU gated_delta_update kernels.\n\n- Add GQA support for differing number of key/query heads and value heads.\n- Validate that H_v is a positive multiple of H_k.\n- Clamp g_t (\u003e 0 -\u003e decay \u003d 1.0) and beta_t (\u003c\u003d 0 -\u003e beta \u003d 0.0) in CPU and GPU kernels to support right-padding sentinel values without decaying or updating the recurrent state on padded tokens.\n- Update CPU and GPU kernel implementations and unit tests.\n\nLiteRT-PiperOrigin-RevId: 990958561\n"
    },
    {
      "commit": "321b9699d9c7257a446017ebb574ae79bbce02ab",
      "tree": "88fdf1fca1a08fe6d1ba4ca77c6e951fd9e1add4",
      "parents": [
        "329107156c4cac5ecd8aaf57494c4f1af2a12021"
      ],
      "author": {
        "name": "Quentin Khan",
        "email": "qkhan@google.com",
        "time": "Wed Sep 30 12:21:36 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 12:26:03 2026"
      },
      "message": "Add a test in attention when the KV cache grows.\n\nLiteRT-PiperOrigin-RevId: 990923109\n"
    },
    {
      "commit": "329107156c4cac5ecd8aaf57494c4f1af2a12021",
      "tree": "36c59bf64d3df22466ae991bc3852d8566d1f36a",
      "parents": [
        "68a99d8dbb145c363636359bbda3e0030268aeee"
      ],
      "author": {
        "name": "Quentin Khan",
        "email": "qkhan@google.com",
        "time": "Wed Sep 30 11:59:52 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 12:02:38 2026"
      },
      "message": "Prepare tests to run over multiple backends.\n\n- Create `TensorHandle` objects instead of `XnnTensor` ones.\n- Make the tests typed over a template description type.\n\nLiteRT-PiperOrigin-RevId: 990913996\n"
    },
    {
      "commit": "68a99d8dbb145c363636359bbda3e0030268aeee",
      "tree": "f213918aa85b238ee2f14a4fce3ecbe2750153fb",
      "parents": [
        "165f86d548053680c67206eb6c5e394d7e3a5a2a"
      ],
      "author": {
        "name": "Quentin Khan",
        "email": "qkhan@google.com",
        "time": "Wed Sep 30 07:53:06 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 07:55:19 2026"
      },
      "message": "Extract buffer mapping logic that can be shared between XNNPACK and YNNPACK runners.\n\nLiteRT-PiperOrigin-RevId: 990806055\n"
    },
    {
      "commit": "165f86d548053680c67206eb6c5e394d7e3a5a2a",
      "tree": "b424ad7df8b267f7bca35bdb3e334a8cff2e63e4",
      "parents": [
        "a0c165ef65d877281ccff3ecdb4302ad65bcf960"
      ],
      "author": {
        "name": "Volodymyr Kysenko",
        "email": "vksnk@google.com",
        "time": "Wed Sep 30 03:04:02 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 03:05:14 2026"
      },
      "message": "Support broadcast-based grouped-query attention (GQA) during prefill in YNNPACK.\n\nInstead of folding query heads into the row/sequence dimension for GQA during prefill, split Q into [n_kv, g] and expand K, V, and the mask to 5D so they broadcast across the group dimension. This updates the K and V transposes to 5D, avoids splitting and fusing logits around mask addition, and fuses the [n_kv, g] head dimensions back together after the P @ V matmul. GQA folding is retained for decode paths and sequence-major inputs.\n\nPiperOrigin-RevId: 990686744\n"
    },
    {
      "commit": "a0c165ef65d877281ccff3ecdb4302ad65bcf960",
      "tree": "8b50ee3c093110075260d767b4b88691520aded7",
      "parents": [
        "75d54fd403e2d386c4b2689be584a3c41263901c"
      ],
      "author": {
        "name": "Fengwu Yao",
        "email": "fengwuyao@google.com",
        "time": "Wed Sep 30 01:21:26 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Wed Sep 30 01:26:00 2026"
      },
      "message": "Unify Flash-Decode SDPA across Metal and OpenCL with UCL wave-SIMD support.\n\nLiteRT-PiperOrigin-RevId: 990649445\n"
    },
    {
      "commit": "75d54fd403e2d386c4b2689be584a3c41263901c",
      "tree": "210b748f26c5e92ad5d1183ce84d73c863158bf6",
      "parents": [
        "826c40dac5a07ef2d3b065121c633ae4c6965005"
      ],
      "author": {
        "name": "Terry Heo",
        "email": "terryheo@google.com",
        "time": "Tue Sep 29 23:49:35 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Tue Sep 29 23:51:00 2026"
      },
      "message": "Add TensorFlow\u0027s third-party repositories to the LiteRT OSS shim\n\nLiteRT build files use several repositories that TensorFlow\u0027s workspace\nmacros used to define. Define them without TensorFlow.\n\n- Added tensorflow_shim_dependencies() for zlib, absl_py, ml_dtypes,\n  fuzztest, jsoncpp, benchmark, hexagon_nn, kissfft, vulkan_headers, the\n  mobilenet test models and Java test libraries. The versions match\n  TensorFlow\u0027s.\n- Added a repository rule like http_archive that can place build files in\n  subdirectories.\n- Branched the ml_dtypes, tflite_mobilenet, hexagon, kissfft and\n  vulkan_headers build files from TensorFlow. Pointed their numpy and\n  platform deps at LiteRT and @platforms labels.\n\nThe WORKSPACE does not call the new macro yet.\n\nLiteRT-PiperOrigin-RevId: 990609212\n"
    },
    {
      "commit": "826c40dac5a07ef2d3b065121c633ae4c6965005",
      "tree": "a8f6e815ed1f655424267ae097a4a543ce612cf6",
      "parents": [
        "e272cd53133e8bb3974f7e3fbd98994e95f34581"
      ],
      "author": {
        "name": "Google AI Edge",
        "email": "ai-edge-bot@google.com",
        "time": "Tue Sep 29 23:27:06 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Tue Sep 29 23:28:29 2026"
      },
      "message": "Protect XNNPACK runtime creation and destruction with workspace_mutex_.\n\n`Subgraph::Prepare` and `Subgraph::Invoke` acquire `Delegate::workspace_mutex_` to serialize access to the shared `xnn_workspace` and its intrusive `first_user` linked list of `xnn_runtime` instances. However, `Subgraph::Create` (`xnn_create_runtime_v4`), `Subgraph::~Subgraph` (`xnn_delete_runtime`), and `Delegate::~Delegate` (`xnn_release_workspace`) previously mutated `workspace-\u003efirst_user` and `workspace-\u003eref_count` or freed the `xnn_runtime` without holding `workspace_mutex_`.\n\nShare `workspace_mutex_` via `std::shared_ptr\u003cstd::mutex\u003e` between `Delegate` and `Subgraph` (matching the ref-counted lifetime of `xnn_workspace`), acquire `workspace_mutex_` around `xnn_create_runtime_v4` in `Subgraph::Create`, before resetting `runtime_` in `Subgraph::~Subgraph`, and before resetting `workspace_` in `Delegate::~Delegate`, clean up `runtime_ptr` under `workspace_mutex_` if `StopBuildStep()` fails, and log an error and return `kTfLiteError` if `runtime_` is null in `Subgraph::Prepare` and `Subgraph::Invoke`.\n\nPiperOrigin-RevId: 990599327\n"
    },
    {
      "commit": "e272cd53133e8bb3974f7e3fbd98994e95f34581",
      "tree": "226238ce2babd9f2f1ed90eea385ae8817d27b02",
      "parents": [
        "8a9cc74dcf1ec22096faf6b28e1a4c35efdfd424",
        "005b95d35972ef455460cfb0f038439c0aa0cb74"
      ],
      "author": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Tue Sep 29 23:05:27 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Tue Sep 29 23:05:27 2026"
      },
      "message": "Merge pull request #10032 from graham0824:dev/hungjuiw/fix-addn-test\n\nLiteRT-PiperOrigin-RevId: 990587014\n"
    },
    {
      "commit": "8a9cc74dcf1ec22096faf6b28e1a4c35efdfd424",
      "tree": "cb9f740bb9a79672e61050d11301e53159fb0532",
      "parents": [
        "c00c77195b42713149d575e12e31107ded9d0f87",
        "ccbdbe982bc45a506d656aa50a85dcaa6de88c98"
      ],
      "author": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Tue Sep 29 23:01:20 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Tue Sep 29 23:01:20 2026"
      },
      "message": "Merge pull request #9665 from graham0824:dev/hungjuiw/qcom-target-backend\n\nLiteRT-PiperOrigin-RevId: 990579814\n"
    },
    {
      "commit": "c00c77195b42713149d575e12e31107ded9d0f87",
      "tree": "e013bcf51f0a30e1620bd240c46da45624132bb3",
      "parents": [
        "b01574633fcf671a78004da968bd0fcb6f280577"
      ],
      "author": {
        "name": "Weiyi Wang",
        "email": "weiyiw@google.com",
        "time": "Tue Sep 29 22:45:14 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Tue Sep 29 22:56:58 2026"
      },
      "message": "[LiteRT][Qualcomm] Set HTP file read memory budget and release mmap pages after QNN context deserialization.\n\nLiteRT-PiperOrigin-RevId: 990577328\n"
    },
    {
      "commit": "b01574633fcf671a78004da968bd0fcb6f280577",
      "tree": "9e55035328924fa07915ff35690baebce5bfeef0",
      "parents": [
        "59097e4aa639726fea71864e6a56574079003151"
      ],
      "author": {
        "name": "Majid Dadashi",
        "email": "majiddadashi@google.com",
        "time": "Tue Sep 29 22:47:38 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Tue Sep 29 22:51:43 2026"
      },
      "message": "Add `cint2_fp32_int4_e8m0_drq` fusion pass and reference `FullyConnected` kernel.\n\n- Add `FuseA4W2DRQFullyConnectedPass` to collapse blockwise Q/DQ patterns (symmetric 32-element i4/e8m0 dynamic activations + centered per-channel i2 weights) into a single `tfl.fully_connected` carrying `tfl.quant_spec \u003d {spec \u003d \"cint2_fp32_int4_e8m0_drq\", act_dilation \u003d ...}` and a per-axis `i2` `tfl.pseudo_qconst`.\n\n- Implement `ParseQuantSpec` and `EvalA4W2DRQ` in the `FullyConnected` reference kernel (bumping max version to 15) to evaluate `a4w2_drq_v1` and reject unrecognized `quant_spec` payloads.\n\nPiperOrigin-RevId: 990578615\n"
    },
    {
      "commit": "59097e4aa639726fea71864e6a56574079003151",
      "tree": "bbcfb7acc167dda1556e2fbf38e0cf0a28cd9fc7",
      "parents": [
        "e86878921d94097573143cb9d59b2b0d25330603"
      ],
      "author": {
        "name": "Majid Dadashi",
        "email": "majiddadashi@google.com",
        "time": "Tue Sep 29 22:47:38 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Tue Sep 29 22:48:36 2026"
      },
      "message": "Add `cint2_fp32_int4_e8m0_drq` fusion pass and reference `FullyConnected` kernel.\n\n- Add `FuseA4W2DRQFullyConnectedPass` to collapse blockwise Q/DQ patterns (symmetric 32-element i4/e8m0 dynamic activations + centered per-channel i2 weights) into a single `tfl.fully_connected` carrying `tfl.quant_spec \u003d {spec \u003d \"cint2_fp32_int4_e8m0_drq\", act_dilation \u003d ...}` and a per-axis `i2` `tfl.pseudo_qconst`.\n\n- Implement `ParseQuantSpec` and `EvalA4W2DRQ` in the `FullyConnected` reference kernel (bumping max version to 15) to evaluate `a4w2_drq_v1` and reject unrecognized `quant_spec` payloads.\n\nLiteRT-Converter-PiperOrigin-RevId: 990578615\n"
    },
    {
      "commit": "e86878921d94097573143cb9d59b2b0d25330603",
      "tree": "4ca31fcaaa479a3536c07ba82df724daa6f82808",
      "parents": [
        "3233ef541bb8cf780129de1c01a675f790da506c",
        "466bb561ad8b2ee3b28deccaa31d5b86b3aad5a8"
      ],
      "author": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Tue Sep 29 22:46:45 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Tue Sep 29 22:46:45 2026"
      },
      "message": "Merge pull request #9480 from graham0824:dev/mingxiup/expand_dims_op\n\nLiteRT-PiperOrigin-RevId: 990576270\n"
    },
    {
      "commit": "3233ef541bb8cf780129de1c01a675f790da506c",
      "tree": "b6fab4faa7047535c2661b7e8983970c8438a2ce",
      "parents": [
        "950d25128f8f77743a7780a1a3c9006bfcbc6dae",
        "444634e92ea419f8982054d323ca6ff1df7fc58a"
      ],
      "author": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Tue Sep 29 22:33:51 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Tue Sep 29 22:33:51 2026"
      },
      "message": "Merge pull request #10188 from graham0824:dev/hungjuiw/transformation-in-compile\n\nLiteRT-PiperOrigin-RevId: 990567591\n"
    },
    {
      "commit": "950d25128f8f77743a7780a1a3c9006bfcbc6dae",
      "tree": "2b687d04a1782a66f5ea29520e4c9063e64d8a4f",
      "parents": [
        "0159226008eb3704c8863664d31fa90485f4eb61"
      ],
      "author": {
        "name": "Gerardo Carranza",
        "email": "gcarranza@google.com",
        "time": "Tue Sep 29 22:16:22 2026"
      },
      "committer": {
        "name": "Copybara-Service",
        "email": "copybara-worker@google.com",
        "time": "Tue Sep 29 22:18:42 2026"
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