| /* |
| * NOTE: Autogenerated file using genpinctrl.py |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <dt-bindings/pinctrl/stm32-pinctrl.h> |
| |
| / { |
| soc { |
| pinctrl: pin-controller@48000000 { |
| |
| /* ADC_IN / ADC_INN / ADC_INP */ |
| |
| adc1_in1_pa0: adc1_in1_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, ANALOG)>; |
| }; |
| |
| adc1_in2_pa1: adc1_in2_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, ANALOG)>; |
| }; |
| |
| adc1_in3_pa2: adc1_in3_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, ANALOG)>; |
| }; |
| |
| adc1_in4_pa3: adc1_in4_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, ANALOG)>; |
| }; |
| |
| adc1_in15_pb0: adc1_in15_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, ANALOG)>; |
| }; |
| |
| adc1_in12_pb1: adc1_in12_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, ANALOG)>; |
| }; |
| |
| adc1_in14_pb11: adc1_in14_pb11 { |
| pinmux = <STM32_PINMUX('B', 11, ANALOG)>; |
| }; |
| |
| adc1_in11_pb12: adc1_in11_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, ANALOG)>; |
| }; |
| |
| adc1_in5_pb14: adc1_in5_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, ANALOG)>; |
| }; |
| |
| adc1_in6_pc0: adc1_in6_pc0 { |
| pinmux = <STM32_PINMUX('C', 0, ANALOG)>; |
| }; |
| |
| adc1_in7_pc1: adc1_in7_pc1 { |
| pinmux = <STM32_PINMUX('C', 1, ANALOG)>; |
| }; |
| |
| adc1_in8_pc2: adc1_in8_pc2 { |
| pinmux = <STM32_PINMUX('C', 2, ANALOG)>; |
| }; |
| |
| adc1_in9_pc3: adc1_in9_pc3 { |
| pinmux = <STM32_PINMUX('C', 3, ANALOG)>; |
| }; |
| |
| adc1_in10_pf0: adc1_in10_pf0 { |
| pinmux = <STM32_PINMUX('F', 0, ANALOG)>; |
| }; |
| |
| adc2_in1_pa0: adc2_in1_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, ANALOG)>; |
| }; |
| |
| adc2_in2_pa1: adc2_in2_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, ANALOG)>; |
| }; |
| |
| adc2_in17_pa4: adc2_in17_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, ANALOG)>; |
| }; |
| |
| adc2_in13_pa5: adc2_in13_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, ANALOG)>; |
| }; |
| |
| adc2_in3_pa6: adc2_in3_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, ANALOG)>; |
| }; |
| |
| adc2_in4_pa7: adc2_in4_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, ANALOG)>; |
| }; |
| |
| adc2_in12_pb2: adc2_in12_pb2 { |
| pinmux = <STM32_PINMUX('B', 2, ANALOG)>; |
| }; |
| |
| adc2_in14_pb11: adc2_in14_pb11 { |
| pinmux = <STM32_PINMUX('B', 11, ANALOG)>; |
| }; |
| |
| adc2_in15_pb15: adc2_in15_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, ANALOG)>; |
| }; |
| |
| adc2_in6_pc0: adc2_in6_pc0 { |
| pinmux = <STM32_PINMUX('C', 0, ANALOG)>; |
| }; |
| |
| adc2_in7_pc1: adc2_in7_pc1 { |
| pinmux = <STM32_PINMUX('C', 1, ANALOG)>; |
| }; |
| |
| adc2_in8_pc2: adc2_in8_pc2 { |
| pinmux = <STM32_PINMUX('C', 2, ANALOG)>; |
| }; |
| |
| adc2_in9_pc3: adc2_in9_pc3 { |
| pinmux = <STM32_PINMUX('C', 3, ANALOG)>; |
| }; |
| |
| adc2_in5_pc4: adc2_in5_pc4 { |
| pinmux = <STM32_PINMUX('C', 4, ANALOG)>; |
| }; |
| |
| adc2_in11_pc5: adc2_in11_pc5 { |
| pinmux = <STM32_PINMUX('C', 5, ANALOG)>; |
| }; |
| |
| adc2_in10_pf1: adc2_in10_pf1 { |
| pinmux = <STM32_PINMUX('F', 1, ANALOG)>; |
| }; |
| |
| adc3_in12_pb0: adc3_in12_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, ANALOG)>; |
| }; |
| |
| adc3_in1_pb1: adc3_in1_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, ANALOG)>; |
| }; |
| |
| adc3_in5_pb13: adc3_in5_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, ANALOG)>; |
| }; |
| |
| adc3_in7_pd10: adc3_in7_pd10 { |
| pinmux = <STM32_PINMUX('D', 10, ANALOG)>; |
| }; |
| |
| adc3_in8_pd11: adc3_in8_pd11 { |
| pinmux = <STM32_PINMUX('D', 11, ANALOG)>; |
| }; |
| |
| adc3_in9_pd12: adc3_in9_pd12 { |
| pinmux = <STM32_PINMUX('D', 12, ANALOG)>; |
| }; |
| |
| adc3_in10_pd13: adc3_in10_pd13 { |
| pinmux = <STM32_PINMUX('D', 13, ANALOG)>; |
| }; |
| |
| adc3_in11_pd14: adc3_in11_pd14 { |
| pinmux = <STM32_PINMUX('D', 14, ANALOG)>; |
| }; |
| |
| adc3_in4_pe7: adc3_in4_pe7 { |
| pinmux = <STM32_PINMUX('E', 7, ANALOG)>; |
| }; |
| |
| adc3_in6_pe8: adc3_in6_pe8 { |
| pinmux = <STM32_PINMUX('E', 8, ANALOG)>; |
| }; |
| |
| adc3_in2_pe9: adc3_in2_pe9 { |
| pinmux = <STM32_PINMUX('E', 9, ANALOG)>; |
| }; |
| |
| adc3_in14_pe10: adc3_in14_pe10 { |
| pinmux = <STM32_PINMUX('E', 10, ANALOG)>; |
| }; |
| |
| adc3_in15_pe11: adc3_in15_pe11 { |
| pinmux = <STM32_PINMUX('E', 11, ANALOG)>; |
| }; |
| |
| adc3_in16_pe12: adc3_in16_pe12 { |
| pinmux = <STM32_PINMUX('E', 12, ANALOG)>; |
| }; |
| |
| adc3_in3_pe13: adc3_in3_pe13 { |
| pinmux = <STM32_PINMUX('E', 13, ANALOG)>; |
| }; |
| |
| /* DAC_OUT */ |
| |
| dac1_out1_pa4: dac1_out1_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, ANALOG)>; |
| }; |
| |
| dac1_out2_pa5: dac1_out2_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, ANALOG)>; |
| }; |
| |
| /* FDCAN_RX */ |
| |
| fdcan1_rx_pa11: fdcan1_rx_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF9)>; |
| }; |
| |
| fdcan1_rx_pb8: fdcan1_rx_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF9)>; |
| }; |
| |
| fdcan1_rx_pd0: fdcan1_rx_pd0 { |
| pinmux = <STM32_PINMUX('D', 0, AF9)>; |
| }; |
| |
| fdcan2_rx_pb5: fdcan2_rx_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF9)>; |
| }; |
| |
| fdcan2_rx_pb12: fdcan2_rx_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, AF9)>; |
| }; |
| |
| /* FDCAN_TX */ |
| |
| fdcan1_tx_pa12: fdcan1_tx_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF9)>; |
| }; |
| |
| fdcan1_tx_pb9: fdcan1_tx_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF9)>; |
| }; |
| |
| fdcan1_tx_pd1: fdcan1_tx_pd1 { |
| pinmux = <STM32_PINMUX('D', 1, AF9)>; |
| }; |
| |
| fdcan2_tx_pb6: fdcan2_tx_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF9)>; |
| }; |
| |
| fdcan2_tx_pb13: fdcan2_tx_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF9)>; |
| }; |
| |
| /* I2C_SCL */ |
| |
| i2c1_scl_pa13: i2c1_scl_pa13 { |
| pinmux = <STM32_PINMUX('A', 13, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_scl_pa15: i2c1_scl_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_scl_pb8: i2c1_scl_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_scl_pa9: i2c2_scl_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_scl_pc4: i2c2_scl_pc4 { |
| pinmux = <STM32_PINMUX('C', 4, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_scl_pf6: i2c2_scl_pf6 { |
| pinmux = <STM32_PINMUX('F', 6, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_scl_pa8: i2c3_scl_pa8 { |
| pinmux = <STM32_PINMUX('A', 8, AF2)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_scl_pc8: i2c3_scl_pc8 { |
| pinmux = <STM32_PINMUX('C', 8, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_scl_pf3: i2c3_scl_pf3 { |
| pinmux = <STM32_PINMUX('F', 3, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_scl_pg7: i2c3_scl_pg7 { |
| pinmux = <STM32_PINMUX('G', 7, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c4_scl_pa13: i2c4_scl_pa13 { |
| pinmux = <STM32_PINMUX('A', 13, AF3)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c4_scl_pc6: i2c4_scl_pc6 { |
| pinmux = <STM32_PINMUX('C', 6, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c4_scl_pf14: i2c4_scl_pf14 { |
| pinmux = <STM32_PINMUX('F', 14, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c4_scl_pg3: i2c4_scl_pg3 { |
| pinmux = <STM32_PINMUX('G', 3, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* I2C_SDA */ |
| |
| i2c1_sda_pa14: i2c1_sda_pa14 { |
| pinmux = <STM32_PINMUX('A', 14, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_sda_pb7: i2c1_sda_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_sda_pb9: i2c1_sda_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_sda_pa8: i2c2_sda_pa8 { |
| pinmux = <STM32_PINMUX('A', 8, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_sda_pf0: i2c2_sda_pf0 { |
| pinmux = <STM32_PINMUX('F', 0, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_sda_pb5: i2c3_sda_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_sda_pc9: i2c3_sda_pc9 { |
| pinmux = <STM32_PINMUX('C', 9, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_sda_pc11: i2c3_sda_pc11 { |
| pinmux = <STM32_PINMUX('C', 11, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_sda_pf4: i2c3_sda_pf4 { |
| pinmux = <STM32_PINMUX('F', 4, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_sda_pg8: i2c3_sda_pg8 { |
| pinmux = <STM32_PINMUX('G', 8, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c4_sda_pb7: i2c4_sda_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF3)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c4_sda_pc7: i2c4_sda_pc7 { |
| pinmux = <STM32_PINMUX('C', 7, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c4_sda_pf15: i2c4_sda_pf15 { |
| pinmux = <STM32_PINMUX('F', 15, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c4_sda_pg4: i2c4_sda_pg4 { |
| pinmux = <STM32_PINMUX('G', 4, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* I2S_CK */ |
| |
| i2s2_ck_pb13: i2s2_ck_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF5)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| i2s2_ck_pf1: i2s2_ck_pf1 { |
| pinmux = <STM32_PINMUX('F', 1, AF5)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| i2s3_ck_pb3: i2s3_ck_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF6)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| i2s3_ck_pc10: i2s3_ck_pc10 { |
| pinmux = <STM32_PINMUX('C', 10, AF6)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| /* I2S_SD */ |
| |
| i2s2_sd_pa11: i2s2_sd_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF5)>; |
| }; |
| |
| i2s2_sd_pb15: i2s2_sd_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF5)>; |
| }; |
| |
| i2s3_sd_pb5: i2s3_sd_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF6)>; |
| }; |
| |
| i2s3_sd_pc12: i2s3_sd_pc12 { |
| pinmux = <STM32_PINMUX('C', 12, AF6)>; |
| }; |
| |
| /* I2S_WS */ |
| |
| i2s2_ws_pb12: i2s2_ws_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, AF5)>; |
| }; |
| |
| i2s2_ws_pf0: i2s2_ws_pf0 { |
| pinmux = <STM32_PINMUX('F', 0, AF5)>; |
| }; |
| |
| i2s3_ws_pa4: i2s3_ws_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF6)>; |
| }; |
| |
| i2s3_ws_pa15: i2s3_ws_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF6)>; |
| }; |
| |
| /* SPI_MISO */ |
| |
| spi1_miso_pa6: spi1_miso_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi1_miso_pb4: spi1_miso_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi1_miso_pg3: spi1_miso_pg3 { |
| pinmux = <STM32_PINMUX('G', 3, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi2_miso_pa10: spi2_miso_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi2_miso_pb14: spi2_miso_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi3_miso_pb4: spi3_miso_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF6)>; |
| bias-pull-down; |
| }; |
| |
| spi3_miso_pc11: spi3_miso_pc11 { |
| pinmux = <STM32_PINMUX('C', 11, AF6)>; |
| bias-pull-down; |
| }; |
| |
| spi4_miso_pe5: spi4_miso_pe5 { |
| pinmux = <STM32_PINMUX('E', 5, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi4_miso_pe13: spi4_miso_pe13 { |
| pinmux = <STM32_PINMUX('E', 13, AF5)>; |
| bias-pull-down; |
| }; |
| |
| /* SPI_MOSI */ |
| |
| spi1_mosi_pa7: spi1_mosi_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi1_mosi_pb5: spi1_mosi_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi1_mosi_pg4: spi1_mosi_pg4 { |
| pinmux = <STM32_PINMUX('G', 4, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi2_mosi_pa11: spi2_mosi_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi2_mosi_pb15: spi2_mosi_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi3_mosi_pb5: spi3_mosi_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF6)>; |
| bias-pull-down; |
| }; |
| |
| spi3_mosi_pc12: spi3_mosi_pc12 { |
| pinmux = <STM32_PINMUX('C', 12, AF6)>; |
| bias-pull-down; |
| }; |
| |
| spi4_mosi_pe6: spi4_mosi_pe6 { |
| pinmux = <STM32_PINMUX('E', 6, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi4_mosi_pe14: spi4_mosi_pe14 { |
| pinmux = <STM32_PINMUX('E', 14, AF5)>; |
| bias-pull-down; |
| }; |
| |
| /* SPI_NSS */ |
| |
| spi1_nss_pa4: spi1_nss_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi1_nss_pa15: spi1_nss_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi1_nss_pg5: spi1_nss_pg5 { |
| pinmux = <STM32_PINMUX('G', 5, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi2_nss_pb12: spi2_nss_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi2_nss_pd15: spi2_nss_pd15 { |
| pinmux = <STM32_PINMUX('D', 15, AF6)>; |
| bias-pull-up; |
| }; |
| |
| spi2_nss_pf0: spi2_nss_pf0 { |
| pinmux = <STM32_PINMUX('F', 0, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi3_nss_pa4: spi3_nss_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF6)>; |
| bias-pull-up; |
| }; |
| |
| spi3_nss_pa15: spi3_nss_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF6)>; |
| bias-pull-up; |
| }; |
| |
| spi4_nss_pe3: spi4_nss_pe3 { |
| pinmux = <STM32_PINMUX('E', 3, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi4_nss_pe4: spi4_nss_pe4 { |
| pinmux = <STM32_PINMUX('E', 4, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi4_nss_pe11: spi4_nss_pe11 { |
| pinmux = <STM32_PINMUX('E', 11, AF5)>; |
| bias-pull-up; |
| }; |
| |
| /* SPI_SCK */ |
| |
| spi1_sck_pa5: spi1_sck_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi1_sck_pb3: spi1_sck_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi1_sck_pg2: spi1_sck_pg2 { |
| pinmux = <STM32_PINMUX('G', 2, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi2_sck_pb13: spi2_sck_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi2_sck_pf1: spi2_sck_pf1 { |
| pinmux = <STM32_PINMUX('F', 1, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi2_sck_pf9: spi2_sck_pf9 { |
| pinmux = <STM32_PINMUX('F', 9, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi2_sck_pf10: spi2_sck_pf10 { |
| pinmux = <STM32_PINMUX('F', 10, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi3_sck_pb3: spi3_sck_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF6)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi3_sck_pc10: spi3_sck_pc10 { |
| pinmux = <STM32_PINMUX('C', 10, AF6)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi3_sck_pg9: spi3_sck_pg9 { |
| pinmux = <STM32_PINMUX('G', 9, AF6)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi4_sck_pe2: spi4_sck_pe2 { |
| pinmux = <STM32_PINMUX('E', 2, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi4_sck_pe12: spi4_sck_pe12 { |
| pinmux = <STM32_PINMUX('E', 12, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| /* TIM_CH / TIM_CHN */ |
| |
| tim1_ch1n_pa7: tim1_ch1n_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF6)>; |
| }; |
| |
| tim1_ch1_pa8: tim1_ch1_pa8 { |
| pinmux = <STM32_PINMUX('A', 8, AF6)>; |
| }; |
| |
| tim1_ch2_pa9: tim1_ch2_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF6)>; |
| }; |
| |
| tim1_ch3_pa10: tim1_ch3_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF6)>; |
| }; |
| |
| tim1_ch1n_pa11: tim1_ch1n_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF6)>; |
| }; |
| |
| tim1_ch4_pa11: tim1_ch4_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF11)>; |
| }; |
| |
| tim1_ch2n_pa12: tim1_ch2n_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF6)>; |
| }; |
| |
| tim1_ch2n_pb0: tim1_ch2n_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF6)>; |
| }; |
| |
| tim1_ch3n_pb1: tim1_ch3n_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF6)>; |
| }; |
| |
| tim1_ch3n_pb9: tim1_ch3n_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF12)>; |
| }; |
| |
| tim1_ch1n_pb13: tim1_ch1n_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF6)>; |
| }; |
| |
| tim1_ch2n_pb14: tim1_ch2n_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF6)>; |
| }; |
| |
| tim1_ch3n_pb15: tim1_ch3n_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF4)>; |
| }; |
| |
| tim1_ch1_pc0: tim1_ch1_pc0 { |
| pinmux = <STM32_PINMUX('C', 0, AF2)>; |
| }; |
| |
| tim1_ch2_pc1: tim1_ch2_pc1 { |
| pinmux = <STM32_PINMUX('C', 1, AF2)>; |
| }; |
| |
| tim1_ch3_pc2: tim1_ch3_pc2 { |
| pinmux = <STM32_PINMUX('C', 2, AF2)>; |
| }; |
| |
| tim1_ch4_pc3: tim1_ch4_pc3 { |
| pinmux = <STM32_PINMUX('C', 3, AF2)>; |
| }; |
| |
| tim1_ch4n_pc5: tim1_ch4n_pc5 { |
| pinmux = <STM32_PINMUX('C', 5, AF6)>; |
| }; |
| |
| tim1_ch1n_pc13: tim1_ch1n_pc13 { |
| pinmux = <STM32_PINMUX('C', 13, AF4)>; |
| }; |
| |
| tim1_ch1n_pe8: tim1_ch1n_pe8 { |
| pinmux = <STM32_PINMUX('E', 8, AF2)>; |
| }; |
| |
| tim1_ch1_pe9: tim1_ch1_pe9 { |
| pinmux = <STM32_PINMUX('E', 9, AF2)>; |
| }; |
| |
| tim1_ch2n_pe10: tim1_ch2n_pe10 { |
| pinmux = <STM32_PINMUX('E', 10, AF2)>; |
| }; |
| |
| tim1_ch2_pe11: tim1_ch2_pe11 { |
| pinmux = <STM32_PINMUX('E', 11, AF2)>; |
| }; |
| |
| tim1_ch3n_pe12: tim1_ch3n_pe12 { |
| pinmux = <STM32_PINMUX('E', 12, AF2)>; |
| }; |
| |
| tim1_ch3_pe13: tim1_ch3_pe13 { |
| pinmux = <STM32_PINMUX('E', 13, AF2)>; |
| }; |
| |
| tim1_ch4_pe14: tim1_ch4_pe14 { |
| pinmux = <STM32_PINMUX('E', 14, AF2)>; |
| }; |
| |
| tim1_ch4n_pe15: tim1_ch4n_pe15 { |
| pinmux = <STM32_PINMUX('E', 15, AF6)>; |
| }; |
| |
| tim1_ch3n_pf0: tim1_ch3n_pf0 { |
| pinmux = <STM32_PINMUX('F', 0, AF6)>; |
| }; |
| |
| tim2_ch1_pa0: tim2_ch1_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF1)>; |
| }; |
| |
| tim2_ch2_pa1: tim2_ch2_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF1)>; |
| }; |
| |
| tim2_ch3_pa2: tim2_ch3_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF1)>; |
| }; |
| |
| tim2_ch4_pa3: tim2_ch4_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF1)>; |
| }; |
| |
| tim2_ch1_pa5: tim2_ch1_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, AF1)>; |
| }; |
| |
| tim2_ch3_pa9: tim2_ch3_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF10)>; |
| }; |
| |
| tim2_ch4_pa10: tim2_ch4_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF10)>; |
| }; |
| |
| tim2_ch1_pa15: tim2_ch1_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF1)>; |
| }; |
| |
| tim2_ch2_pb3: tim2_ch2_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF1)>; |
| }; |
| |
| tim2_ch3_pb10: tim2_ch3_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF1)>; |
| }; |
| |
| tim2_ch4_pb11: tim2_ch4_pb11 { |
| pinmux = <STM32_PINMUX('B', 11, AF1)>; |
| }; |
| |
| tim2_ch1_pd3: tim2_ch1_pd3 { |
| pinmux = <STM32_PINMUX('D', 3, AF2)>; |
| }; |
| |
| tim2_ch2_pd4: tim2_ch2_pd4 { |
| pinmux = <STM32_PINMUX('D', 4, AF2)>; |
| }; |
| |
| tim2_ch4_pd6: tim2_ch4_pd6 { |
| pinmux = <STM32_PINMUX('D', 6, AF2)>; |
| }; |
| |
| tim2_ch3_pd7: tim2_ch3_pd7 { |
| pinmux = <STM32_PINMUX('D', 7, AF2)>; |
| }; |
| |
| tim3_ch2_pa4: tim3_ch2_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF2)>; |
| }; |
| |
| tim3_ch1_pa6: tim3_ch1_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF2)>; |
| }; |
| |
| tim3_ch2_pa7: tim3_ch2_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF2)>; |
| }; |
| |
| tim3_ch3_pb0: tim3_ch3_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF2)>; |
| }; |
| |
| tim3_ch4_pb1: tim3_ch4_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF2)>; |
| }; |
| |
| tim3_ch1_pb4: tim3_ch1_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF2)>; |
| }; |
| |
| tim3_ch2_pb5: tim3_ch2_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF2)>; |
| }; |
| |
| tim3_ch4_pb7: tim3_ch4_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF10)>; |
| }; |
| |
| tim3_ch1_pc6: tim3_ch1_pc6 { |
| pinmux = <STM32_PINMUX('C', 6, AF2)>; |
| }; |
| |
| tim3_ch2_pc7: tim3_ch2_pc7 { |
| pinmux = <STM32_PINMUX('C', 7, AF2)>; |
| }; |
| |
| tim3_ch3_pc8: tim3_ch3_pc8 { |
| pinmux = <STM32_PINMUX('C', 8, AF2)>; |
| }; |
| |
| tim3_ch4_pc9: tim3_ch4_pc9 { |
| pinmux = <STM32_PINMUX('C', 9, AF2)>; |
| }; |
| |
| tim3_ch1_pe2: tim3_ch1_pe2 { |
| pinmux = <STM32_PINMUX('E', 2, AF2)>; |
| }; |
| |
| tim3_ch2_pe3: tim3_ch2_pe3 { |
| pinmux = <STM32_PINMUX('E', 3, AF2)>; |
| }; |
| |
| tim3_ch3_pe4: tim3_ch3_pe4 { |
| pinmux = <STM32_PINMUX('E', 4, AF2)>; |
| }; |
| |
| tim3_ch4_pe5: tim3_ch4_pe5 { |
| pinmux = <STM32_PINMUX('E', 5, AF2)>; |
| }; |
| |
| tim4_ch1_pa11: tim4_ch1_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF10)>; |
| }; |
| |
| tim4_ch2_pa12: tim4_ch2_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF10)>; |
| }; |
| |
| tim4_ch3_pa13: tim4_ch3_pa13 { |
| pinmux = <STM32_PINMUX('A', 13, AF10)>; |
| }; |
| |
| tim4_ch1_pb6: tim4_ch1_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF2)>; |
| }; |
| |
| tim4_ch2_pb7: tim4_ch2_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF2)>; |
| }; |
| |
| tim4_ch3_pb8: tim4_ch3_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF2)>; |
| }; |
| |
| tim4_ch4_pb9: tim4_ch4_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF2)>; |
| }; |
| |
| tim4_ch1_pd12: tim4_ch1_pd12 { |
| pinmux = <STM32_PINMUX('D', 12, AF2)>; |
| }; |
| |
| tim4_ch2_pd13: tim4_ch2_pd13 { |
| pinmux = <STM32_PINMUX('D', 13, AF2)>; |
| }; |
| |
| tim4_ch3_pd14: tim4_ch3_pd14 { |
| pinmux = <STM32_PINMUX('D', 14, AF2)>; |
| }; |
| |
| tim4_ch4_pd15: tim4_ch4_pd15 { |
| pinmux = <STM32_PINMUX('D', 15, AF2)>; |
| }; |
| |
| tim4_ch4_pf6: tim4_ch4_pf6 { |
| pinmux = <STM32_PINMUX('F', 6, AF2)>; |
| }; |
| |
| tim5_ch1_pa0: tim5_ch1_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF2)>; |
| }; |
| |
| tim15_ch1n_pa1: tim15_ch1n_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF9)>; |
| }; |
| |
| tim5_ch2_pa1: tim5_ch2_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF2)>; |
| }; |
| |
| tim15_ch1_pa2: tim15_ch1_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF9)>; |
| }; |
| |
| tim5_ch3_pa2: tim5_ch3_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF2)>; |
| }; |
| |
| tim15_ch2_pa3: tim15_ch2_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF9)>; |
| }; |
| |
| tim5_ch4_pa3: tim5_ch4_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF2)>; |
| }; |
| |
| tim5_ch1_pb2: tim5_ch1_pb2 { |
| pinmux = <STM32_PINMUX('B', 2, AF2)>; |
| }; |
| |
| tim15_ch1_pb14: tim15_ch1_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF1)>; |
| }; |
| |
| tim15_ch1n_pb15: tim15_ch1n_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF2)>; |
| }; |
| |
| tim15_ch2_pb15: tim15_ch2_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF1)>; |
| }; |
| |
| tim5_ch2_pc12: tim5_ch2_pc12 { |
| pinmux = <STM32_PINMUX('C', 12, AF1)>; |
| }; |
| |
| tim5_ch3_pe8: tim5_ch3_pe8 { |
| pinmux = <STM32_PINMUX('E', 8, AF1)>; |
| }; |
| |
| tim5_ch4_pe9: tim5_ch4_pe9 { |
| pinmux = <STM32_PINMUX('E', 9, AF1)>; |
| }; |
| |
| tim5_ch1_pf6: tim5_ch1_pf6 { |
| pinmux = <STM32_PINMUX('F', 6, AF6)>; |
| }; |
| |
| tim5_ch2_pf7: tim5_ch2_pf7 { |
| pinmux = <STM32_PINMUX('F', 7, AF6)>; |
| }; |
| |
| tim5_ch3_pf8: tim5_ch3_pf8 { |
| pinmux = <STM32_PINMUX('F', 8, AF6)>; |
| }; |
| |
| tim15_ch1_pf9: tim15_ch1_pf9 { |
| pinmux = <STM32_PINMUX('F', 9, AF3)>; |
| }; |
| |
| tim5_ch4_pf9: tim5_ch4_pf9 { |
| pinmux = <STM32_PINMUX('F', 9, AF6)>; |
| }; |
| |
| tim15_ch2_pf10: tim15_ch2_pf10 { |
| pinmux = <STM32_PINMUX('F', 10, AF3)>; |
| }; |
| |
| tim15_ch1n_pg9: tim15_ch1n_pg9 { |
| pinmux = <STM32_PINMUX('G', 9, AF14)>; |
| }; |
| |
| tim16_ch1_pa6: tim16_ch1_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF1)>; |
| }; |
| |
| tim16_ch1_pa12: tim16_ch1_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF1)>; |
| }; |
| |
| tim16_ch1n_pa13: tim16_ch1n_pa13 { |
| pinmux = <STM32_PINMUX('A', 13, AF1)>; |
| }; |
| |
| tim16_ch1_pb4: tim16_ch1_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF1)>; |
| }; |
| |
| tim16_ch1n_pb6: tim16_ch1n_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF1)>; |
| }; |
| |
| tim16_ch1_pb8: tim16_ch1_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF1)>; |
| }; |
| |
| tim16_ch1_pe0: tim16_ch1_pe0 { |
| pinmux = <STM32_PINMUX('E', 0, AF4)>; |
| }; |
| |
| tim17_ch1_pa7: tim17_ch1_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF1)>; |
| }; |
| |
| tim17_ch1_pb5: tim17_ch1_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF10)>; |
| }; |
| |
| tim17_ch1n_pb7: tim17_ch1n_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF1)>; |
| }; |
| |
| tim17_ch1_pb9: tim17_ch1_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF1)>; |
| }; |
| |
| tim17_ch1_pe1: tim17_ch1_pe1 { |
| pinmux = <STM32_PINMUX('E', 1, AF4)>; |
| }; |
| |
| tim8_ch1n_pa7: tim8_ch1n_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF4)>; |
| }; |
| |
| tim8_ch2_pa14: tim8_ch2_pa14 { |
| pinmux = <STM32_PINMUX('A', 14, AF5)>; |
| }; |
| |
| tim8_ch1_pa15: tim8_ch1_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF2)>; |
| }; |
| |
| tim8_ch2n_pb0: tim8_ch2n_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF4)>; |
| }; |
| |
| tim8_ch3n_pb1: tim8_ch3n_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF4)>; |
| }; |
| |
| tim8_ch1n_pb3: tim8_ch1n_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF4)>; |
| }; |
| |
| tim8_ch2n_pb4: tim8_ch2n_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF4)>; |
| }; |
| |
| tim8_ch3n_pb5: tim8_ch3n_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF3)>; |
| }; |
| |
| tim8_ch1_pb6: tim8_ch1_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF5)>; |
| }; |
| |
| tim8_ch2_pb8: tim8_ch2_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF10)>; |
| }; |
| |
| tim8_ch3_pb9: tim8_ch3_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF10)>; |
| }; |
| |
| tim8_ch1_pc6: tim8_ch1_pc6 { |
| pinmux = <STM32_PINMUX('C', 6, AF4)>; |
| }; |
| |
| tim8_ch2_pc7: tim8_ch2_pc7 { |
| pinmux = <STM32_PINMUX('C', 7, AF4)>; |
| }; |
| |
| tim8_ch3_pc8: tim8_ch3_pc8 { |
| pinmux = <STM32_PINMUX('C', 8, AF4)>; |
| }; |
| |
| tim8_ch4_pc9: tim8_ch4_pc9 { |
| pinmux = <STM32_PINMUX('C', 9, AF4)>; |
| }; |
| |
| tim8_ch1n_pc10: tim8_ch1n_pc10 { |
| pinmux = <STM32_PINMUX('C', 10, AF4)>; |
| }; |
| |
| tim8_ch2n_pc11: tim8_ch2n_pc11 { |
| pinmux = <STM32_PINMUX('C', 11, AF4)>; |
| }; |
| |
| tim8_ch3n_pc12: tim8_ch3n_pc12 { |
| pinmux = <STM32_PINMUX('C', 12, AF4)>; |
| }; |
| |
| tim8_ch4n_pc13: tim8_ch4n_pc13 { |
| pinmux = <STM32_PINMUX('C', 13, AF6)>; |
| }; |
| |
| tim8_ch4n_pd0: tim8_ch4n_pd0 { |
| pinmux = <STM32_PINMUX('D', 0, AF6)>; |
| }; |
| |
| tim8_ch4_pd1: tim8_ch4_pd1 { |
| pinmux = <STM32_PINMUX('D', 1, AF4)>; |
| }; |
| |
| /* UART_CTS / USART_CTS / LPUART_CTS */ |
| |
| lpuart1_cts_pa6: lpuart1_cts_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF12)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart1_cts_pa11: usart1_cts_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| lpuart1_cts_pb13: lpuart1_cts_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| lpuart1_cts_pg5: lpuart1_cts_pg5 { |
| pinmux = <STM32_PINMUX('G', 5, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_cts_pa0: usart2_cts_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_cts_pd3: usart2_cts_pd3 { |
| pinmux = <STM32_PINMUX('D', 3, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_cts_pa13: usart3_cts_pa13 { |
| pinmux = <STM32_PINMUX('A', 13, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_cts_pb13: usart3_cts_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_cts_pd11: usart3_cts_pd11 { |
| pinmux = <STM32_PINMUX('D', 11, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| uart4_cts_pb7: uart4_cts_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF14)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| uart5_cts_pb5: uart5_cts_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF14)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* UART_RTS / USART_RTS / LPUART_RTS */ |
| |
| usart1_rts_pa12: usart1_rts_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| lpuart1_rts_pb1: lpuart1_rts_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF12)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| lpuart1_rts_pb12: lpuart1_rts_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| lpuart1_rts_pg6: lpuart1_rts_pg6 { |
| pinmux = <STM32_PINMUX('G', 6, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_rts_pa1: usart2_rts_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_rts_pd4: usart2_rts_pd4 { |
| pinmux = <STM32_PINMUX('D', 4, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_rts_pb14: usart3_rts_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_rts_pd12: usart3_rts_pd12 { |
| pinmux = <STM32_PINMUX('D', 12, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_rts_pf6: usart3_rts_pf6 { |
| pinmux = <STM32_PINMUX('F', 6, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| uart4_rts_pa15: uart4_rts_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| uart5_rts_pb4: uart5_rts_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* UART_RX / USART_RX / LPUART_RX */ |
| |
| lpuart1_rx_pa3: lpuart1_rx_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF12)>; |
| }; |
| |
| usart1_rx_pa10: usart1_rx_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF7)>; |
| }; |
| |
| usart1_rx_pb7: usart1_rx_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF7)>; |
| }; |
| |
| lpuart1_rx_pb10: lpuart1_rx_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF8)>; |
| }; |
| |
| lpuart1_rx_pc0: lpuart1_rx_pc0 { |
| pinmux = <STM32_PINMUX('C', 0, AF8)>; |
| }; |
| |
| usart1_rx_pc5: usart1_rx_pc5 { |
| pinmux = <STM32_PINMUX('C', 5, AF7)>; |
| }; |
| |
| usart1_rx_pe1: usart1_rx_pe1 { |
| pinmux = <STM32_PINMUX('E', 1, AF7)>; |
| }; |
| |
| lpuart1_rx_pg8: lpuart1_rx_pg8 { |
| pinmux = <STM32_PINMUX('G', 8, AF8)>; |
| }; |
| |
| usart2_rx_pa3: usart2_rx_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF7)>; |
| }; |
| |
| usart2_rx_pa15: usart2_rx_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF7)>; |
| }; |
| |
| usart2_rx_pb4: usart2_rx_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF7)>; |
| }; |
| |
| usart2_rx_pd6: usart2_rx_pd6 { |
| pinmux = <STM32_PINMUX('D', 6, AF7)>; |
| }; |
| |
| usart3_rx_pb8: usart3_rx_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF7)>; |
| }; |
| |
| usart3_rx_pb11: usart3_rx_pb11 { |
| pinmux = <STM32_PINMUX('B', 11, AF7)>; |
| }; |
| |
| usart3_rx_pc11: usart3_rx_pc11 { |
| pinmux = <STM32_PINMUX('C', 11, AF7)>; |
| }; |
| |
| usart3_rx_pd9: usart3_rx_pd9 { |
| pinmux = <STM32_PINMUX('D', 9, AF7)>; |
| }; |
| |
| usart3_rx_pe15: usart3_rx_pe15 { |
| pinmux = <STM32_PINMUX('E', 15, AF7)>; |
| }; |
| |
| uart4_rx_pc11: uart4_rx_pc11 { |
| pinmux = <STM32_PINMUX('C', 11, AF5)>; |
| }; |
| |
| uart5_rx_pd2: uart5_rx_pd2 { |
| pinmux = <STM32_PINMUX('D', 2, AF5)>; |
| }; |
| |
| /* UART_TX / USART_TX / LPUART_TX */ |
| |
| lpuart1_tx_pa2: lpuart1_tx_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF12)>; |
| bias-pull-up; |
| }; |
| |
| usart1_tx_pa9: usart1_tx_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart1_tx_pb6: usart1_tx_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF7)>; |
| bias-pull-up; |
| }; |
| |
| lpuart1_tx_pb11: lpuart1_tx_pb11 { |
| pinmux = <STM32_PINMUX('B', 11, AF8)>; |
| bias-pull-up; |
| }; |
| |
| lpuart1_tx_pc1: lpuart1_tx_pc1 { |
| pinmux = <STM32_PINMUX('C', 1, AF8)>; |
| bias-pull-up; |
| }; |
| |
| usart1_tx_pc4: usart1_tx_pc4 { |
| pinmux = <STM32_PINMUX('C', 4, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart1_tx_pe0: usart1_tx_pe0 { |
| pinmux = <STM32_PINMUX('E', 0, AF7)>; |
| bias-pull-up; |
| }; |
| |
| lpuart1_tx_pg7: lpuart1_tx_pg7 { |
| pinmux = <STM32_PINMUX('G', 7, AF8)>; |
| bias-pull-up; |
| }; |
| |
| usart1_tx_pg9: usart1_tx_pg9 { |
| pinmux = <STM32_PINMUX('G', 9, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart2_tx_pa2: usart2_tx_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart2_tx_pa14: usart2_tx_pa14 { |
| pinmux = <STM32_PINMUX('A', 14, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart2_tx_pb3: usart2_tx_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart2_tx_pd5: usart2_tx_pd5 { |
| pinmux = <STM32_PINMUX('D', 5, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart3_tx_pb9: usart3_tx_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart3_tx_pb10: usart3_tx_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart3_tx_pc10: usart3_tx_pc10 { |
| pinmux = <STM32_PINMUX('C', 10, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart3_tx_pd8: usart3_tx_pd8 { |
| pinmux = <STM32_PINMUX('D', 8, AF7)>; |
| bias-pull-up; |
| }; |
| |
| uart4_tx_pc10: uart4_tx_pc10 { |
| pinmux = <STM32_PINMUX('C', 10, AF5)>; |
| bias-pull-up; |
| }; |
| |
| uart5_tx_pc12: uart5_tx_pc12 { |
| pinmux = <STM32_PINMUX('C', 12, AF5)>; |
| bias-pull-up; |
| }; |
| |
| /* USB */ |
| |
| usb_dm_pa11: usb_dm_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, ANALOG)>; |
| }; |
| |
| usb_dp_pa12: usb_dp_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, ANALOG)>; |
| }; |
| |
| }; |
| }; |
| }; |
